參數(shù)資料
型號(hào): FDC6301N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 小信號(hào)晶體管
英文描述: Dual N-Channel , Digital FET
中文描述: 220 mA, 25 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SUPERSOT-6
文件頁(yè)數(shù): 2/4頁(yè)
文件大?。?/td> 73K
代理商: FDC6301N
Electrical Characteristics
(T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
25
V
Breakdown Voltage Temp. Coefficient
25
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= 20 V, V
GS
= 0 V
1
μA
T
J
= 55°C
10
μA
I
GSS
ON CHARACTERISTICS
(Note 2)
V
GS(th)
/
T
J
V
GS(th)
Gate Threshold Voltage
R
DS(ON)
Static Drain-Source On-Resistance
Gate - Body Leakage Current
V
GS
= 8 V, V
DS
= 0 V
100
nA
Gate Threshold Voltage Temp.Coefficient
I
D
= 250 μA, Referenced to 25
o
C
-2.1
mV /
o
C
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= 2.7 V, I
D
= 0.2 A
0.65
0.85
1.5
V
3.8
5
T
J
=125°C
6.3
9
V
GS
= 4.5 V, I
D
= 0.4 A
V
GS
= 2.7 V, V
DS
= 5 V
V
DS
= 5 V, I
D
= 0.4 A
3.1
4
I
D(ON)
g
FS
DYNAMIC CHARACTERISTICS
On-State Drain Current
0.2
A
Forward Transconductance
0.25
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
Input Capacitance
V
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
9.5
pF
Output Capacitance
6
pF
Reverse Transfer Capacitance
1.3
pF
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Inverter Electrical Characteristics
(T
A
= 25° C unless otherwise noted)
I
O (off)
Zero Input Voltage Output Current
V
I
(off)
Input Voltage
V
I
(on)
R
O (on)
Output to Ground Resistance
Turn - On Delay Time
V
DD
= 6 V, I
D
= 0.5 A,
V
GS
= 4.5 V, R
GEN
= 50
5
10
ns
Turn - On Rise Time
4.5
10
ns
Turn - Off Delay Time
4
8
ns
Turn - Off Fall Time
3.2
7
ns
Total Gate Charge
V
DS
= 5 V, I
D
= 0.2 A,
V
GS
= 4.5 V
0.49
0.7
nC
Gate-Source Charge
0.22
nC
Gate-Drain Charge
0.07
nC
V
CC
= 20 V, V
I
= 0 V
V
CC
= 5 V, I
O
= 10 μA
V
O
= 0.3 V, I
O
= 0.005 A
V
I
= 2.7 V, I
O
= 0.2 A
1
μA
0.5
V
1
V
3.8
5
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design. R
θ
JA
shown below for single device operation on FR-4 in still air.
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDC6301N Rev.C
b. 180
O
C/W on a 0.005 in
2
of pad
of 2oz copper.
a. 140
O
C/W on a 0.125 in
2
pad of
2oz copper.
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