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參數(shù)資料
| 型號(hào)： | FCBS0650 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Smart Power Module (SPM) |
| 中文描述： | AC MOTOR CONTROLLER, 8 A, DMA27 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 257K |
| 代理商： | FCBS0650 |
11
www.fairchildsemi.com
FCBS0650 Rev. A
F
Note:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed circuit board. The SPM input signal section integrates 3.3k
(
typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the sig-
nal voltage drop at input terminal.
2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 9. Recommended CPU I/O Interface Circuit
Note:
1. It would be recommended that the bootstrap diode, D
BS
, has soft and fast recovery characteristics.
2. The bootstrap resistor (R
BS
) should be 3 times greater than R
E(H)
. The recommended value of R
E(H)
is 5.6
, but it can be increased up to 20
(maximum) for a slower dv/dt
of high-side.
3. The ceramic capacitor placed between V
CC
-COM should be over 1uF and mounted as close to the pins of the SPM as possible.
Fig. 10. Recommended Bootstrap Operation Circuit and Parameters
CPU
COM
5V-Line
1nF
4.7k
IN
(UL)
IN
(VL)
IN
(WL)
,
,
IN
(UH)
IN
(VH)
IN
(WH)
V
FO
100
1nF
SPM
R
PF
=
C
PF
=
15V-Line
22uF
0.1uF
1000uF
1uF
One-Leg Diagram of SPM
Inverter
Output
P
N
These Values depend on PWM Control Algorithm
D
BS
R
BS
R
E(H)
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