參數(shù)資料
型號(hào): FC80960HT75SL2GT
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor
中文描述: 32-BIT, 75 MHz, RISC PROCESSOR, PQFP208
封裝: PLASTIC, QFP-208
文件頁(yè)數(shù): 87/102頁(yè)
文件大?。?/td> 828K
代理商: FC80960HT75SL2GT
80960HA/HD/HT
Advance Information
Datasheet
81
-- Project code HA
-- File **NOT** verified electrically
-- ------------------------------------------------
-- Rev 0.7
18 Dec
1995
Updated for A-1 stepping.
-- Rev 0.6
08 Dec
1994
-- Rev 0.5
21 Nov
1994
-- Rev 0.4
31 Oct
1994
-- Rev 0.3
26 July 1994
-- Rev 0.2
22 June 1994
-- Rev 0.1
16 Mar
1994
-- Rev 0.0
30 Aug
1993
entity Ha_Processor is
generic(PHYSICAL_PIN_MAP : string:= “PGA”);
port (A
: out
bit_vector(2 to 31);
ADSBAR
: out
bit;
BEBAR
: out
bit_vector(0 to 3);
BLASTBAR
: out
bit;
BOFFBAR
: in
bit;
BREQ
: out
bit;
BSTALL
: out
bit;
BTERMBAR
: in
bit;
CT
: out
bit_vector(0 to 3);
CLKIN
: in
bit;
D
: inout
bit_vector(0 to 31);
DENBAR
: out
bit;
DP
: inout
bit_vector(0 to 3);
DTRBAR
: out
bit;
DCBAR
: out
bit;
FAILBAR
: out
bit;
HOLD
: in
bit;
HOLDA
: out
bit;
LOCKBAR
: out
bit;
NMIBAR
: in
bit;
ONCEBAR
: in
bit;
PCHKBAR
: out
bit;
READYBAR
: in
bit;
RESETBAR
: in
bit;
STEST
: in
bit;
Example 1. Boundary-Scan Description Language (BSDL)for PGA Package Example (Sheet2 of8)
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