參數(shù)資料
型號: FC80960HD50SL2GM
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor
中文描述: 32-BIT, 50 MHz, RISC PROCESSOR, PQFP208
封裝: PLASTIC, QFP-208
文件頁數(shù): 46/102頁
文件大?。?/td> 828K
代理商: FC80960HD50SL2GM
80960HA/HD/HT
40
Advance Information
Datasheet
Figure 15. Hold Acknowledge Timings
Figure 16. Bus Backoff (BOFF) Timings
CLKIN
1.5 V
1.5 V
1.5 V
HOLD
T
IS
Min
T
IH
Min
1.5 V
T
IH
Min
T
IS
Min
HOLDA
T
OV1
T
OV1
Max
Min
Max
Min
T
OH1
T
OH1
T
T
— OUTPUT DELAY - The maximum output delay is referred to as the Output Valid Delay (T
OV
).
The minimum output delay is referred to as the Output Hold (T
OH
).
T
T
— INPUT SETUP AND HOLD - The input setup and hold requirements specify the sampling window
during which synchronous inputs must be stable for correct processor operation.
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
CLKIN
1.5 V
1.5 V
1.5 V
BOFF
T
IS
T
IH
T
IH
T
IS
1.5 V
1.5 V
1.5 V
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