參數(shù)資料
型號: FAB2200UCX
廠商: Fairchild Semiconductor
文件頁數(shù): 16/18頁
文件大?。?/td> 0K
描述: IC SUBSYSTEM HDPH AMP G 25-WLCSP
標準包裝: 1
類型: D 類;G 類
輸出類型: 1-通道(單聲道),帶立體聲耳機
在某負載時最大輸出功率 x 通道數(shù)量: 1.2W x 1 @ 8 歐姆; 41mW x 2 @ 32 歐姆
電源電壓: 2.8 V ~ 5.25 V
特點: 消除爆音,差分輸入,I²C,靜音,短路和熱保護,關機,音量控制
安裝類型: 表面貼裝
供應商設備封裝: 25-WLCSP
封裝/外殼: 25-UFBGA,WLCSP
包裝: 標準包裝
其它名稱: FAB2200UCXFSDKR
7
COMMERCIALTEMPERATURERANGE
IDT72V70180 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 128 x 128
TABLE 2 — CONSTANT THROUGHPUT
DELAY VALUE
TABLE 3 — INTERNAL REGISTER AND ADDRESS MEMORY MAPPING
TABLE 1 — VARIABLE THROUGHPUT
DELAY VALUE
NOTE:
1. Bit A7 must be high for access to data and connection memory positions. Bit A7 must be low for access to registers.
OE bit in Connection
ODE pin
OSB bit in IMS
TX Output Driver
Memory
Register
Status
0
Don’t Care
Per Channel
High-Impedance
1
0
High-Impedance
1
0
1
Enable
1
Enable
1
0
Enable
TABLE 4 — OUTPUT HIGH IMPEDANCE CONTROL
Delay for Variable Throughput Delay Mode
Input Rate
(m – output channel number)
(n – input channel number)
m < n
m = n, n+1, n+2
m > n+2
2.048 Mb/s 32 – (n-m) time-slots m-n + 32 time-slots
m-ntime-slots
Delay for Constant Throughput Delay Mode
Input Rate
(m – output channel number)
(n – input channel number)
2.048 Mb/s
32 + (32 – n) + m time-slots
A7(1)
A6
A5
A4
A3
A2
A1
A0
Location
0
000
0000
Control Register, CR
0
000
0001
Interface Mode Selection Register, IMS
0
000
0010
Frame Alignment Register, FAR
0
000
0011
Frame Input Offset Register, FOR
1
000
0000
Ch0
1
000
0001
Ch1
1
0
.
....
.
1
001
1110
Ch30
1
001
1111
Ch31
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