參數(shù)資料
型號: FA5502
廠商: FUJI ELECTRIC HOLDINGS CO., LTD.
英文描述: POWER SUPPLY CONTROL IC
中文描述: 電源控制IC
文件頁數(shù): 20/23頁
文件大?。?/td> 215K
代理商: FA5502
(4) Output overvoltage at light load
A compensation circuit for light load is incorporated
for preventing an overvoltage when light or no load.
Though, according to the condition, this circuit may not
compensate enough and overvoltage may occur. To
prevent overvoltage, the following condition must be
satisfied.
- Noise filter resistor Rn connected to IDET pin (pin
16) must be below 27
.
- As shown in Fig.22, DC gain limiting resistor R10
for current error amplifier must not be connected
between IFB pin (pin 1) and IIN- pin (pin 2).
20
Quality is our message
(6) Improvement of output voltage regulation
As stated in “9-(5)”, the output voltage may change
with input voltage or load current on the circuit in Fig.6
in "8-(2)", thereby causing a problem in some case. In
such a case, the circuit in Fig.24 may improve the
regulation.
FA5502P/M
2
1
IIN-
IFB
FA5502
C2
R5
C3
R10
Fig.22 Prevention of overvoltage at light load
(5) Notes for setting the output voltage and
overvoltage limit
In the actual circuit, the output voltage drops
depending on the line voltage or load current.
Therefore, the output voltage may be lower than the
voltage calculated by expression (1) in "8-(2)". When
setting the output voltage, sufficiently evaluate it on an
actual circuit.
On the circuit shown in Fig.6 in "8-(2)", the
overvoltage setting is fixed at 1.058 times the output
voltage setting.
For setting the overvoltage independently of the
output voltage setting, connect voltage divider
additionally to OVP pin as shown in Fig.23.
On the circuit in Fig.23, even if the voltage divider
for setting the output voltage has troubled, the
overvoltage limiting circuit operates properly, thereby
preventing the output voltage from rising excessively.
5
6
4
Vo
VFB
VIN-
OVP
R4
C1
R3
R2
R1
MUL
F.F.
Vr
=1.55V(typ.)
Vp
=1.058Vr(typ.)
R12
R11
OVP.COMP
ER.AMP
Fig.23 Independent setting of OVP limit
5
6
Vo
VFB
VIN-
R3
R2
R1
MUL
Vr
=1.55V(typ.)
C9
R13
C8
Fig.24 ER.AMP circuit for improvement of regulation
Voltage gainAv2 of this circuit is expressed by:
3
R
)
13
R
9
C
8
C
j
)
9
C
8
C
((
j
13
R
×
9
C
ω
j
1
A
2
V
×
+
+
ω
×
ω
+
=
(18)
Optimum values depend on an each circuit.
Referring the following relations or the example
applied to “10 Example of application circuit”, adjust
the values on actual circuit.
- Set the voltage gain Av2 at 100 or 120 Hz almost
the same as before changing the compensation
circuit.
- Determine C8, C9 and R13 so as to satisfy the
following relations.
Set fz determined by the following expression to
several Hz to several ten Hz.
13
R
9
C
2
1
×
f
Z
π
=
(19)
Set fp determined by the following expression so
that the fp/fz ratio is about 10.
9
C
8
C
9
C
8
C
C
13
R
C
2
1
×
fp
+
×
=
π
=
(20)
*Example of values applied to “10 Example of
application circuit”
C8=0.033μF, C9=0.15μF,
R13=330k
, R3=100k
(These values are given as references and not
intended for guaranteeing the operation in any
circuit.)
In this circuit, not only the output voltage
characteristics at a steady status but also transient
response to line voltage and load current may change.
Before determining the circuit values, evaluate
sufficiently.
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