參數(shù)資料
型號: FA5502
廠商: FUJI ELECTRIC HOLDINGS CO., LTD.
英文描述: POWER SUPPLY CONTROL IC
中文描述: 電源控制IC
文件頁數(shù): 15/23頁
文件大小: 215K
代理商: FA5502
15
Quality is our message
FA5502P/M
Z
P
frequency
v
G1
Fig.8 Voltage gain of CUR.AMP
(4) PWM comparator
Fig.9 shows the configuration of PWM comparator.
Oscillator output V
CT
and current error amplifier output
V
IFB
are compared. While V
CT
< V
IFB
, PWM
comparator output goes High and OUT pin also goes
High. Note that, during the oscillator discharge period,
OUT pin is forced to be Low, thereby determining the
maximum duty cycle. (see characteristics curve).
CS pin (pin 11) is a soft start pin. When start up, an
internal constant current (11μA (typ.)) charges
capacitor C4 for soft start. Priority is given to V
CS
or
V
IFB
whichever is lower. Fig.10 shows PWM
comparator timing chart.
11
11μA
CS
Oscillator output
(CT pin)
CUR.AMP output
(IFB pin)
C4
Output
circuit
V
CT
V
IFB
V
CS
PWM.COMP
7.5V
Fig.9 PWM comparator circuit
V
CT
V
CS
V
IFB
OUT
pin
Normal operation
t
t
V
CT
V
CS
V
IFB
OUT
pin
Operation with Dmax
t
t
Fig.10 PWM comparator timing chart
(5) Multiplier
The multiplier generates a current reference signal.
The rectified line voltage is divided down by resistor
and monitored by VDET pin (pin 3). Considering the
dynamic range of multiplier, design the R6 and R7 in
Fig.11 so that the peak voltage at VDET pin within a
range from 0.65V to 2.4V over the entire range of line
voltage. VFB pin is normally above 1.55V and, at this
status, multiplier output voltage Vm is approximately
expressed by:
VDET
V
VFB
V
)
55
.
(
K
25
.
Vm
×
×
=
(8)
Where
K: Output voltage factor (multiplier section)
When VFB pin is lower than 1.55V, compensation
circuit for light load operates.
As shown in Fig.7, Vm is applied via a resistor of
11 k
to inverting input (IIN-) of current error amplifier
CUR. AMP. (For input/output characteristics of
multiplier, see characteristics curve.)
ER.AMP output
(VFB pin)
MUL
3
V
VFB
V
VDET
VDET
Vm
V
IN
R7
R6
Fig.11 Multiplier circuit
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