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| 型號(hào)： | EVAL-CN0217-EB1Z |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 22/40頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR CN0217 |
| 設(shè)計(jì)資源： | CN-0217 Circuit Eval Board |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Circuits from the Lab™ |
| 主要目的： | 阻抗轉(zhuǎn)換器 |
| 已用 IC / 零件： | AD5933，AD5934，AD8606 |
| 主要屬性： | 網(wǎng)絡(luò)分析器 |
| 次要屬性： | I²C 接口 |
| 已供物品： | 板 |
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Data Sheet
AD5933
Rev. E | Page 29 of 40
READ OPERATIONS
The AD5933 uses two I2C read protocols: receive byte and
block read.
Receive Byte
In the AD5933, the receive byte protocol is used to read a single
byte of data from a register address whose address has previously
been set by setting the address pointer.
In this operation, the master device receives a single byte from a
slave device as follows (see Figure 33):
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
read bit (high).
3. The addressed slave device asserts an acknowledge on SDA.
4. The master receives a data byte.
5. The master asserts a no acknowledge on SDA (the slave
needs to check that master has received data).
6. The master asserts a stop condition on SDA and the
transaction ends.
S
R
A
P
SLAVE
ADDRESS
REGISTER
DATA
05324-
039
Figure 33. Reading Register Data
Block Read
In this operation, the master device reads a block of data from a
slave device (see Figure 34). The start address for a block read
must previously have been set by setting the address pointer.
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts an acknowledge on SDA.
4. The master sends a command code (1010 0001) that tells
the slave device to expect a block read.
5. The slave asserts an acknowledge on SDA.
6. The master sends a byte-count data byte that tells the slave
how many data bytes to expect.
7. The slave asserts an acknowledge on SDA.
8. The master asserts a repeat start condition on SDA. This is
required to set the read bit high.
9. The master sends the 7-bit slave address followed by the
read bit (high).
10. The slave asserts an acknowledge on SDA.
11. The master receives the data bytes.
12. The master asserts an acknowledge on SDA after each
data byte.
13. A no acknowledge is generated after the last byte to signal
the end of the read.
14. The master asserts a stop condition on SDA to end the
transaction.
NUMBER
BYTES READ
S
SLAVE
ADDRESS
W
A
BLOCK
READ
A
S
SLAVE
ADDRESS
R
A
BYTE 0
A
BYTE 1
A
BYTE 2
A
P
05324-
040
Figure 34. Performing a Block Read
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