參數資料
型號: EVAL-ADF4360-6EBZ1
廠商: Analog Devices Inc
文件頁數: 13/24頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR ADF4360-6
標準包裝: 1
主要目的: 計時,頻率合成器
嵌入式:
已用 IC / 零件: ADF4360-6
主要屬性: 帶 VCO 的單路整數-N PLL
次要屬性: 1.15GHz,200kHz PFD
已供物品: 板,線纜,軟件
相關產品: ADF4360-6BCPZ-ND - IC SYNTHESIZER VCO 24LFCSP
ADF4360-6BCPZRL7-ND - IC SYNTHESIZER VCO 24LFCSP
ADF4360-6BCPZRL-ND - IC SYNTHESIZER VCO 24LFCSP
ADF4360-6
Data Sheet
Rev. B | Page 20 of 24
APPLICATIONS
DIRECT CONVERSION MODULATOR
Direct conversion architectures are increasingly being used to
implement base station transmitters. Figure 17 shows how ADI
parts can be used to implement such a system.
The circuit block diagram shows the AD9761 TxDAC being
used with the AD8349. The use of dual integrated DACs, such
as the AD9761 with its specified ±0.02 dB and ±0.004 dB gain
and offset matching characteristics, ensures minimum error
contribution (over temperature) from this portion of the
signal chain.
The local oscillator is implemented using the ADF4360-6. The
low-pass filter was designed using ADIsimPLL for a channel
spacing of 200 kHz and an open-loop bandwidth of 10 kHz.
The LO ports of the AD8349 can be driven differentially from
the complementary RFOUTA and RFOUTB outputs of the
ADF4360-6. This gives better performance than a single-ended
LO driver and eliminates the often necessary use of a balun to
convert from a single-ended LO input to the more desirable
differential LO inputs for the AD8349. The typical rms phase
noise (100 Hz to 100 kHz) of the LO in this configuration is 1.07°.
The AD8349 accepts LO drive levels from 10 dBm to 0 dBm.
The optimum LO power can be software programmed on the
ADF4360-6, which allows levels from 13.5 dBm to 4.5 dBm
from each output.
The RF output is designed to drive a 50 Ω load but must be ac-
coupled, as shown in Figure 17. If the I and Q inputs are driven
in quadrature by 2 V p-p signals, the resulting output power
from the modulator is approximately 2 dBm.
AD9761
TxDAC
AD8349
REFIO
FSADJ
MODULATED
DIGITAL
DATA
QOUTB
IOUTA
IOUTB
QOUTA
2k
LOW-PASS
FILTER
LOW-PASS
FILTER
S
P
ICOMP
ATIBLE
S
E
R
IAL
BUS
ADF4360-6
VVCO
CPGND
AGND
DGND RF
OUTB
RFOUTA
CP
1nF
330pF
12nF
47nH
2.7pF
100pF
TO
RF PA
7.5nH
1nF
4.7k
6.8k
3.9k
RSET
CC
LE
DATA
CLK
REFIN
FREFIN
CN
VTUNE
DVDD AVDD CE MUXOUT
VPS1
IBBP
IBBN
QBBP
QBBN
LOIP
LOIN
VPS2
5
4
24
7
20
23
2
21
6
14
16
17
18
19
13
1
3
8
9
10
11
22
15
12
VDD
LOCK
DETECT
PHASE
SPLITTER
04440-021
51
10
F
Figure 17. Direct Conversion Modulator
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