參數(shù)資料
型號： EVAL-AD5501EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 16/20頁
文件大小： 0K
描述： BOARD EVAL FOR AD5501
標準包裝： 1
DAC 的數(shù)量： 1
位數(shù)： 12
采樣率（每秒）： 16M
數(shù)據(jù)接口： SPI?、QSPI?、MICROWIRE? 和 DSP
設置時間： 45µs
DAC 型： 電壓
工作溫度： -40°C ~ 105°C
已供物品： 板
已用 IC / 零件： AD5501
Data Sheet
AD5501
Rev. C | Page 5 of 20
Parameter
Symbol
Min
Typ1
Max
Unit
Test Conditions/Comments
POWER SUPPLIES
V
DD
10
62
V
LOGIC
2.3
5.5
V
Quiescent Supply Current
I
QUIESCENT
0.6
0.75
mA
Static conditions; DAC output =
midscale
Logic Supply Current
I
LOGIC
0.4
2
A
V
IH = VLOGIC; VIL = DGND
DC PSRR4
30 V mode
76
dB
DAC output = full scale
60 V mode
68
dB
DAC output = full scale
POWER-DOWN MODE
Supply Current
I
DD_PWD
Software Power-Down Mode
30
50
A
Junction Temperature6
T
J
130
°C
T
J = TA + PTOTAL × θJA
1 Typical specifications represent average readings at 25°C, V
DD = 62 V, and VLOGIC = 5 V.
2 Valid in the output voltage range of (AGND + 0.5 V) to (V
DD 0.5 V). Output is unloaded.
3 Includes linearity, offset, and gain drift.
4 Guaranteed by design and characterization. Not production tested.
5 The DAC architecture gives a fixed linear voltage output range of 0 V to 30 V if R_SEL is held high and 0 V to 60 V if R_SEL is held low. As the output voltage range is
limited by output amplifier compliance, VDD should be set to at least 0.5 V higher than the maximum output voltage to ensure compliance.
6 If the die temperature exceeds 110°C, the AD5501 enters a temperature power-down mode putting the DAC output into a high impedance state thereby removing
the short-circuit condition. Overheating caused by long term short-circuit condition(s) is detected by an integrated thermal sensor. After power-down, the AD5501
remains powered down until a software power-up command is executed.
7 Maximum resistance between V
OUT and VFB pins.
AC CHARACTERISTICS
VDD = 10 V to 62 V; VLOGIC = 2.3 V to 5.5 V; RL = 60 k; CL = 200 pF; 40°C < TA < +105°C, unless otherwise noted.
Table 3.
Parameter1, 2
Min
Typ
Max
Unit
Test Conditions/Comments3
AC CHARACTERISTICS
Output Voltage Settling Time
to scale settling to ±1 LSB, R
L = 60 k
60 V Mode
45
55
s
30 V Mode
25
35
s
Slew Rate
0.65
V/s
Digital-to-Analog Glitch Energy
300
nV-s
1 LSB change around major carry in 60 V mode
Glitch Impulse Peak Amplitude
170
mV
60 V mode
Digital Feedthrough
5
nV-s
Peak-to-Peak Noise
140
μV p-p
0.1 Hz to 10 Hz; DAC code = 0x800
4
mV p-p
0.1 Hz to 10 kHz; DAC code = 0x800
1 Guaranteed by design and characterization; not production tested.
2 See the Terminology section.
3 Temperature range is 40°C to + 105°C, typical at 25°C.
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