REGOUT
參數(shù)資料
型號: EVAL-AD5421SDZ
廠商: Analog Devices Inc
文件頁數(shù): 33/36頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD5421
標準包裝: 1
DAC 的數(shù)量: 1
位數(shù): 16
數(shù)據(jù)接口: 串行,SPI?
設置時間: 50µs
DAC 型: 電壓
工作溫度: -40°C ~ 105°C
已供物品:
已用 IC / 零件: AD5421
AD5421
Data Sheet
Rev. G | Page 6 of 36
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
REGOUT OUTPUT
Voltage regulator output
Output Voltage
1.8
12
V
Output Voltage TC3
110
ppm/°C
Output Voltage Accuracy
4
±2
+4
%
Externally Available Current3, 6
3.15
mA
Assuming 4 mA flowing in the loop
and during HART communications
Short-Circuit Current
23
mA
Line Regulation3
500
μV/V
Internal NMOS
10
μV/V
External NMOS
Load Regulation3
8
mV/mA
Inductive Load
50
mH
Stable operation
Capacitive Load
2
10
F
Recommended operation
ADC ACCURACY
Die Temperature
±5
°C
VLOOP Input
±1
%
DVDD OUTPUT
Can be overdriven up to 5.5 V
Output Voltage
3.17
3.3
3.48
V
Externally Available Current3, 6
3.15
mA
Assuming 4 mA flowing in the loop
and during HART communications
Short-Circuit Current
7.7
mA
Load Regulation
45
mV/mA
Measured at 0 mA and 3 mA loads
DIGITAL INPUTS3
SCLK, SYNC, SDIN, LDAC
Input High Voltage, VIH
0.7 × IODVDD
V
Input Low Voltage, VIL
0.25 × IODVDD V
Hysteresis
0.21
V
IODVDD = 1.8 V
0.63
V
IODVDD = 3.3 V
1.46
V
IODVDD = 5.5 V
Input Current
0.015
+0.015
A
Per pin
Pin Capacitance
5
pF
Per pin
DIGITAL OUTPUTS3
SDO Pin
Output Low Voltage, VOL
0.4
V
Output High Voltage, VOH
IODVDD 0.5
V
High Impedance Leakage
Current
0.01
+0.01
A
High Impedance Output
Capacitance
5
pF
FAULT Pin
Output Low Voltage, VOL
0.4
V
Output High Voltage, VOH
IODVDD 0.5
V
FAULT THRESHOLDS
ILOOP Under
ILOOP 0.01% FSR
mA
ILOOP Over
ILOOP + 0.01% FSR
mA
Temp 140°C
133
°C
Fault removed when temperature
≤ 125°C
Temp 100°C
90
°C
Fault removed when temperature
≤ 85°C
VLOOP 6V
0.3
V
Fault removed when VLOOP ≥ 0.4 V
VLOOP 12V
0.6
V
Fault removed when VLOOP ≥ 0.7 V
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