TA = 25°C, unless oth" />
參數(shù)資料
型號： EVAL-AD5421SDZ
廠商： Analog Devices Inc
文件頁數(shù)： 3/36頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD5421
標準包裝： 1
DAC 的數(shù)量： 1
位數(shù)： 16
數(shù)據(jù)接口： 串行，SPI?
設置時間： 50µs
DAC 型： 電壓
工作溫度： -40°C ~ 105°C
已供物品： 板
已用 IC / 零件： AD5421
Data Sheet
AD5421
Rev. G | Page 11 of 36
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up
to 100 mA do not cause SCR latch-up.
Table 6.
Parameter
Rating
REGIN to COM
0.3 V to +60 V
REGOUT to COM
0.3 V to +14 V
Digital Inputs to COM,
RANGE0, RANGE1, RINT/REXT,
ALARM_CURRENT_DIRECTION,
REG_SEL0, REG_SEL1, REG_SEL2
0.3 V to DVDD + 0.3 V
or +7 V (whichever is less)
Digital Inputs to COM
SCLK, SDIN, SYNC, LDAC
0.3 V to IODVDD + 0.3 V
or +7 V (whichever is less)
Digital Outputs to COM,
SDO, FAULT
0.3 V to IODVDD + 0.3 V
or +7 V (whichever is less)
REFIN to COM
0.3 V to +7 V
REFOUT1, REFOUT2
0.3 V to +4.7 V
VLOOP to COM
0.3 V to +60 V
LOOP to COM
5 V to +0.3 V
DVDD to COM
0.3 V to +7 V
IODVDD to COM
0.3 V to +7 V
REXT1, CIN to COM
0.3 V to +4.3 V
REXT2 to COM
0.3 V to +0.3 V
DRIVE to COM
0.3 V to +11 V
Operating Temperature Range (TA)
Industrial
40°C to +105°C
Storage Temperature Range
65°C to +150°C
Junction Temperature (TJ MAX)
125°C
Power Dissipation
(TJ MAX TA)/θJA
Lead Temperature,
Soldering (10 sec)
JEDEC Industry Standard
J-STD-020
ESD
Human Body Model
3 kV
Field Induced Charged Device
Model
2 kV
Machine Model
200 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
θJA1
θJC
Unit
28-Lead TSSOP_EP (RE-28-2)
32
9
°C/W
32-Lead LFCSP_WQ (CP-32-11)
40
7
°C/W
1
Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with thermal vias. See JEDEC JESD51.
ESD CAUTION
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