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參數(shù)資料
| 型號： | EVAL-AD5380EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5380 |
| 產(chǎn)品培訓模塊： | DAC Architectures |
| 標準包裝： | 1 |
| DAC 的數(shù)量： | 40 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125k |
| 數(shù)據(jù)接口： | DSP，I²C，MICROWIRE?，并行，QSPI?，SPI? |
| 設置時間： | 8µs |
| DAC 型： | 電壓 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | AD5380 |
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AD5380
Data Sheet
Rev. C | Page 34 of 40
AD5380 MONITOR FUNCTION
The AD5380 contains a channel monitor function that consists
of a multiplexer addressed via the interface, allowing any chan-
nel output to be routed to this pin for monitoring using an
external ADC. In channel monitor mode, VOUT39 becomes
the MON_OUT pin, to which all monitored signals are routed.
The channel monitor function must be enabled in the control
register before any channels are routed to MON_OUT. Table 17
contains the decoding information required to route any chan-
nel to MON_OUT. Selecting Channel Address 63 three-states
MON_OUT. Figure 41 shows a typical monitoring circuit
implemented using a 12-bit SAR ADC in a 6-lead SOT-23
package. The controller output port selects the channel to be
monitored, and the input port reads the converted data from
the ADC.
AD7476
GND
SDATA
CS
SCLK
VDD
VIN
VOUT39/MON_OUT
AGND
DIN
SYNC
SCLK
DAC_GND SIGNAL_GND
VOUT0
VOUT38
AVDD
AD5380
OUTPUT PORT
INPUT PORT
CONTROLLER
03731-041
Figure 41. Typical Channel Monitoring Circuit
TOGGLE MODE FUNCTION
The toggle mode function allows an output signal to be gener-
ated using the LDAC control signal that switches between two
DAC data registers. This function is configured using the SFR
control register as follows. A write with REG1 = REG0 = 0 and
A5 to A0 = 001100 specifies a control register write. The toggle
mode function is enabled in groups of eight channels using Bits
CR6 to CR2 in the control register. See the AD5380 control
register description. Figure 42 shows a block diagram of toggle
mode implementation. Each of the 40 DAC channels on the
AD5380 contain an A and B data register. Note that the B
registers can only be loaded when toggle mode is enabled. The
sequence of events when configuring the AD5380 for toggle
mode is
1. Enable toggle mode for the required channels via the
control register.
2. Load data to A registers.
3. Load data to B registers.
4. Apply LDAC.
The LDAC is used to switch between the A and B registers in
determining the analog output. The first LDAC configures the
output to reflect the data in the A registers. This mode offers
significant advantages if the user wants to generate a square
wave at the output of all 40 channels, as might be required to
drive a liquid crystal based variable optical attenuator. In this
case, the user writes to the control register and enables the
toggle function by setting CR6 to CR2 = 1, thus enabling the
five groups of eight for toggle mode operation. The user must
then load data to all 40 A and B registers. Toggling LDAC will
set the output values to reflect the data in the A and B registers.
The frequency of the LDAC will determine the frequency of the
square wave output.
Toggle mode is disabled via the control register. The first LDAC
following the disabling of the toggle mode will update the
outputs with the data contained in the A registers.
14-BIT DAC
DAC
REGISTER
INPUT
DATA
INPUT
REGISTER
DATA
REGISTER
B
DATA
REGISTER
A
A/B
VOUT
LDAC
CONTROL INPUT
03731-042
Figure 42. Toggle Mode Function
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