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參數(shù)資料
| 型號： | ES1371 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ENSONIQ AudioPCI 97 digital controller |
| 中文描述： | ENSONIQ AudioPCI 97數(shù)字控制器 |
| 文件頁數(shù)： | 20/37頁 |
| 文件大小： | 103K |
| 代理商： | ES1371 |
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ENSONIQ Proprietary Information
ENSONIQ Proprietary Information
ENSONIQ AudioPCI 97 Specification Rev 1.1 Oct 1, 1997
20
7.4.
Sample Rate Converter
This block receives or sends samples from/to the serial interface block for the playback/record channels. It
also provides the necessary sample rate conversion for the AC97 CODEC. The Sample Rate Converter
block contains one 32 bit register. This register is used to read/write the Sample Rate Converter
FIFO/Control RAM.
Sample Rate Converter Interface
Register
Addressable as longword
Power on reset value 00000000H
Bit(s)
R/W
Name
31:25
R/W
SRC_RAM_ADR
Address 10H
Direct Mapped
Function
These bits are the address of the Sample Rate Converter RAM
location to be accessed.
This bit is the read/write control bit for accessing the Sample Rate
Converter RAM.
This bit when high indicates the Sample Rate Converter is accessing
the RAM. This bit will be set within 3 PCI clocks after accessing
this register. This bit will be Reset when the requested
read/write RAM operation has been completed.
This is the enable bit for the Sample Rate Converter.
0 - Sample Rate Converter enabled.
1 - Sample Rate Converter disabled.
This bit when high will disable Playback channel 1 from updating
the accumulator.
0 - Playback channel 1 accumulator update enabled.
1 - Playback channel 1 accumulator update disabled.
This bit when high will disable Playback channel 2 from updating
the accumulator.
0 - Playback channel 2 accumulator update enabled.
1 - Playback channel 2 accumulator update disabled.
This bit when high will disable Record channel from updating the
accumulator.
0 - Record channel accumulator update enabled.
1 - Record channel accumulator update disabled.
These bits are undefined.
These bits are the value of the RAM to be read/written from /to the
RAM at the location pointed to by the SRC_RAM_ADR address
pointer above.
24
R/W
SRC_RAM_WE
23
R
SRC_RAM_BUSY
22
R/W
SRC_DISABLE
21
R/W
DIS_P1
20
R/W
DIS_P2
19
R/W
DIS_REC
18:16
15:0
R/W
R/W
UNDEFINED
SRC_RAM_DATA
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| ES14 | 制造商:Baumer Electric Ag 功能描述: |
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