參數(shù)資料
型號: EPM9320BI356-15
文件頁數(shù): 38/42頁
文件大?。?/td> 489K
代理商: EPM9320BI356-15
Altera Corporation
5
MAX 9000 Programmable Logic Device Family Data Sheet
The MAX 9000 family is supported by Altera’s MAX+PLUS II
development system, a single, integrated software package that offers
schematic, text—including VHDL, Verilog HDL, and the Altera
Hardware Description Language (AHDL)—and waveform design entry,
compilation and logic synthesis, simulation and timing analysis, and
device programming. The MAX+PLUS II software provides EDIF 2 0 0
and 3 0 0, LPM, and other interfaces for additional design entry and
simulation support from other industry-standard PC- and UNIX-
workstation-based EDA tools. The MAX+PLUS II software runs on
Windows-based PCs as well as Sun SPARCstation, HP 9000 Series
700/800, and IBM RISC System/6000 workstations.
f For more information on development tools, see the MAX+PLUS II
Functional
Description
MAX 9000 devices use a third-generation MAX architecture that yields
both high performance and a high degree of utilization for most
applications. The MAX 9000 architecture includes the following elements:
Logic array blocks
Macrocells
Expander product terms (shareable and parallel)
FastTrack Interconnect
Dedicated inputs
I/O cells
Figure 1 shows a block diagram of the MAX 9000 architecture.
相關PDF資料
PDF描述
EPM9320BI356-20
EPM9320GI280-15
EPM9320GI280-20
EPM9320LC84-15
EPM9320LC84-20
相關代理商/技術參數(shù)
參數(shù)描述
EPM9320BI356-20 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9320GI280-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9320GI280-20 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9320LC84-15 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 9000 320 Macro 60 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM9320LC84-20 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 9000 320 Macro 60 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100