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參數(shù)資料
| 型號： | EPM7192EQI160-7 |
| 英文描述： | Electrically-Erasable Complex PLD |
| 中文描述： | 電可擦除復雜可編程邏輯器件 |
| 文件頁數(shù)： | 19/60頁 |
| 文件大?。?/td> | 1030K |
| 代理商： | EPM7192EQI160-7 |
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26
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3)
For EPM7128A and EPM7256A devices only, VCC must rise monotonically.
(4)
In MAX 7000AE devices, all pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before
VCCINT and VCCIO are powered.
(5)
These values are specified under the recommended operating conditions shown in Table 11 on page 24.
(6)
The parameter is measured with 50% of the outputs each sourcing the specified current. The IOH parameter refers
to high-level TTL or CMOS output current.
(7)
The parameter is measured with 50% of the outputs each sinking the specified current. The IOL parameter refers to
low-level TTL or CMOS output current.
(8)
This value is specified for normal device operation. The value may vary during power-up.
(9)
For EPM7128A and EPM7256A devices, this pull-up exists while a device is programmed in-system.
(10) For MAX 7000AE devices, this pull-up exists while devices are programmed in-system and in unprogrammed
devices during power-up.
(11) Capacitance is measured at 25
°C and is sample-tested only. The OE1 pin (high-voltage pin during programming)
has a maximum capacitance of 20 pF.
(12) The POR time for MAX 7000A devices does not exceed 100 ms.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EPM7192QC160-12 | 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 12NS PROP DELAY, 160 Pin, Plastic, QFP |
| epm7192qc160-2 | 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 20NS PROP DELAY, 160 Pin, Plastic, QFP |
| EPM7192QC160-20 | 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 20NS PROP DELAY, 160 Pin, Plastic, QFP |
| EPM7192S | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family |
| EPM7192SQC160-10 | 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 7000 192 Macro 124 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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