參數(shù)資料
型號(hào): EPM7192EQI160-7
英文描述: Electrically-Erasable Complex PLD
中文描述: 電可擦除復(fù)雜可編程邏輯器件
文件頁(yè)數(shù): 12/60頁(yè)
文件大?。?/td> 1030K
代理商: EPM7192EQI160-7
2
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
...and More
Features
I
MultiVoltTM I/O interface enables device core to run at 3.3 V, while
I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
I
Pin counts ranging from 44 to 256 in a variety of thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space-
saving FineLine BGATM, and plastic J-lead chip carrier (PLCC)
packages
I
Supports hot-socketing in MAX 7000AE devices
I
Programmable interconnect array (PIA) continuous routing structure
for fast, predictable performance
I
PCI-compatible
I
Bus-friendly architecture, including programmable slew-rate control
I
Open-drain output option
I
Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
I
Programmable power-up states for macrocell registers in
MAX 7000AE devices
I
Programmable power-saving mode for 50% or greater power
reduction in each macrocell
I
Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
I
Programmable security bit for protection of proprietary designs
I
6 to 10 pin- or logic-driven output enable signals
I
Two global clock signals with optional inversion
I
Enhanced interconnect resources for improved routability
I
Fast input setup times provided by a dedicated path from I/O pin to
macrocell registers
I
Programmable output slew-rate control
I
Programmable ground pins
I
Software design support and automatic place-and-route provided by
Altera’s development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
Table 1. MAX 7000A Device Features
Feature
EPM7032AE
EPM7064AE
EPM7128AE
EPM7256AE
EPM7512AE
Usable gates
600
1,250
2,500
5,000
10,000
Macrocells
32
64
128
256
512
Logic array blocks
2
4
8
16
32
Maximum user I/O
pins
36
68
100
164
212
tPD (ns)
4.5
5.0
5.5
7.5
tSU (ns)
2.9
2.8
3.3
3.9
5.6
tFSU (ns)
2.5
3.0
tCO1 (ns)
3.0
3.1
3.4
3.5
4.7
fCNT (MHz)
227.3
222.2
192.3
172.4
116.3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7192QC160-12 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 12NS PROP DELAY, 160 Pin, Plastic, QFP
epm7192qc160-2 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 20NS PROP DELAY, 160 Pin, Plastic, QFP
EPM7192QC160-20 制造商:Altera Corporation 功能描述:COMPLEX-EEPLD, 192-CELL, 20NS PROP DELAY, 160 Pin, Plastic, QFP
EPM7192S 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family
EPM7192SQC160-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 192 Macro 124 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100