參數(shù)資料
型號(hào)： EPL43102
英文描述： Graphic STN LCD Drivers with Built-in RAM
中文描述： 圖形STN液晶顯示器驅(qū)動(dòng)器，內(nèi)置內(nèi)存
文件頁(yè)數(shù)： 9/64頁(yè)
文件大?。?/td> 280K
代理商： EPL43102
43 COM / 102 SEG LCD DRIVER
The information in this document is subject to change without notice.
12
2.
Parallel mode (8-bit length): When the parallel input is selected (PS = ”H”), D0~D7
can be connected directly to the 80-series or 68-series MPU by setting the C86 pin
to high or low.
Figure 4
Common
80-series
68-series
A0
/RD
/WR
R/W
Description
H
L
H
Display data read
H
L
Display data write
L
H
Register status read
L
H
L
Writes to Instruction register
DATA TRANSFER
The EPL43102 uses a bus holder and an internal data bus for data transfer with MPU.
When writing data from the MPU to the DDRAM, data is automatically transferred from
the bus holder to the DDRAM. When reading data from the DDRAM to MPU, the data for
the initial read cycle is stored in the bus holder (dummy read) and MPU reads this stored
data from bus holder for the next data read cycle.
D7~D0
/WR
/RD
D7~D0
N
Dummy
D(N)
D(N+1)
D(N+3)
D(N+2)
N
D(N)
D(N+1)
D(N+2)
D(N+3)
D(N+4)
A0
/RD
/WR
A0
Writing Timing
Reading Timing
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