參數(shù)資料
型號: EPL43102
英文描述: Graphic STN LCD Drivers with Built-in RAM
中文描述: 圖形STN液晶顯示器驅動器,內置內存
文件頁數(shù): 4/64頁
文件大?。?/td> 280K
代理商: EPL43102
43 COM / 102 SEG LCD DRIVER
The information in this document is subject to change without notice.
7
SYSTEM CONTROL
Name
I/O
Description
Master/slave operation select pin.
- MS = "H": Master operation
- MS = "L": Slave operation
M/S CLS
OSC.
Power
supply
circuit
CL FR FRS /DOF
“H”
Available
O
“H”
“L”
Unavailable
Available
O
“L”
*
Unavailable Unavailable
I
Hi-Z
I
M/S
I
NOTE: * : Don’t Care
O : Output
I : Input
P/S
I
Select Interface mode with the MPU.
When PS = "High": Parallel interface mode.
When PS = "Low": Serial interface mode.
FR
I/O
LCD AC signal input/output pin.
When is used in master/slave mode (multi-chip), the FR pins must
be connected each other.
- MS = “H”: Output
- MS = “L”: Input
C68
I
Select the kinds of the MPU to interface.
When C68 = "High": 68-series MPU interface mode
When C68 = "Low": 80-series MPU interface
LCD Display blanking control pin. In multi-chip mode, the /DOF pin
must be connected to each other.
M/S = ”H” (Master) : /DOF is output pin.
Display “On” = “H”, Display “Off” = “L”
M/S = ”L” (Slave) : /DOF is input pin.
Via external control. Refer to the following table.
/DOF
Instruction
H
L
Display “On”
On
Off
Display “Off”
Off
/DOF
I/O
CLS
I
Internal oscillator circuit enable / disable select pin.
CLS = “H”: Internal oscillator circuit is enable
CLS = “L”: Internal oscillator circuit is disable
(External display clock input to OSC pin)
Display clock input/output pin.
When the EPL43102 is used in master/slave mode (multi-chip), the
CL pins must be connected each other.
M/S
CL
“H”
Output
“L”
Input
CL
I/O
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