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參數(shù)資料
| 型號： | EPIC |
| 英文描述： | EPiC Family Product Line (304k) |
| 中文描述： | 史詩系列產(chǎn)品線（304k） |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 304K |
| 代理商： | EPIC |
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www.semtech.com
HIGH PERFORMANCE PRODUCTS
Revision 1/December 3, 2001
AN1001
General Information (con’d)
IN
IN*
CLK
CLK*
SEL*
SEL
OUT0
OUT0*
D
D*
Q
Q*
OUT1
OUT1*
OUT2
OUT2*
OUT3
OUT3*
OUT4
OUT4*
0
1
However, consider a 500 MHz example.
Example B:
F = 500 MHz, T = 2 ns, ts = 500 ps, Thold = 500 ps
This situation leaves only 1 ns for all remaining sources
of timing error. Using the same clock and data distribu-
tion components, with a total error of ~3 ns, the sys-
tem no longer functions.
Total Error+ ts+ Thold = ~3 ns+.5 ns + .5 ns
2 ns!
There is no longer adequate setup and hold time.
To address applications where Every Picoseconds
Counts, Semtech offers the EPiC Product Line, consist-
ing of three product families - the 15XX, 19XX, and 44XX.
All three product families are optimized for high speed
clock and data distribution applications in terms of:
Speed
Accuracy
Integration
Functionality
Speed and Accuracy
The EPiC product line is extremely fast and accurate.
All three families operate up to 3 GHz while maintain-
ing timing accuracy.
All EPiC products have very accurate, tight, stable, and
repeatable timing characteristics. The EPiC product line
is designed to minimize any timing errors associated
with:
1) part to part variation
2) channel to channel variation
3) rise / fall time mismatches
4) positive vs. negative transition propagation delays
5) changes in duty cycle, pattern, or frequency
6) environmental changes (voltage and temperature).
Functionality and Integration
The EPiC product lines support unusually high levels of
integration via three techniques:
1) Packaging - the 5 mm x 5 mm TQFP package has a
very small footprint with very low pin inductance.
2) Functional Integration - each part can perform sev-
eral functions traditionally implemented with
distinct ICs:
a) level translation (wide voltage range input
capability: ECL, PECL, and double swing output
options)
b) resynchronization (flip-flop and MUX integrated)
c) fanout (1:5, 1:9 available)
d) synchronous enable / disable
3) On-chip terminations - the inclusion of current
sources and resistors integrates many space con-
suming passive components typically placed on the
PCB. For further ECL/PECL termination techniques,
refer to the applcation note AN1003.
The 15XX and 19XX product families are designed to
buffer a high speed signal, resynchronize it (if required),
and then distribute multiple identical versions of this
signal to multiple destinations.
SK15XX Functional Block Diagram
SK15XX, SK19XX Functionality
Semtech “EPiC Family” Product Line
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