參數(shù)資料
型號(hào): EN29LV160AT-70TCP
廠商: Electronic Theatre Controls, Inc.
英文描述: Replaced by PTN78000W :
中文描述: 16兆位(2048K × 8 -位/ 1024 kX的16位)閃存
文件頁(yè)數(shù): 29/43頁(yè)
文件大?。?/td> 930K
代理商: EN29LV160AT-70TCP
Table 12. AC CHARACTERISTICS
Read-only Operations Characteristics
Parameter
Symbols
JEDEC
Standard
t
AVAV
t
RC
Read Cycle Time
This Data Sheet may be revised by subsequent versions 2004 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2005/01/07
EN29LV160A
Speed Options
Description
Test
Setup
-70
70
-90
90
Unit
ns
Min
t
AVQV
t
ACC
Address to Output Delay
CE# = V
IL
OE#=
V
IL
OE#= V
IL
Max
70
90
ns
t
ELQV
t
CE
Chip Enable To Output Delay
Max
70
90
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
30
35
ns
t
EHQZ
t
DF
Chip Enable to Output High Z
Max
20
20
ns
t
GHQZ
t
DF
Output Enable to Output High Z
Max
20
20
ns
t
AXQX
t
OH
Output Hold Time from
Addresses, CE# or OE#,
whichever occurs first
Min
0
0
ns
Notes:
For - 70
For all others:
Vcc = 3.0V ± 5%
Output Load : 1 TTL gate and 30pF
Input Rise and Fall Times: 5ns
Input Rise Levels: 0.0 V to 3.0 V
Timing Measurement Reference Level, Input and Output: 1.5 V
Vcc = 2.7V – 3.6V
Output Load: 1 TTL gate and 100 pF
Input Rise and Fall Times: 5 ns
Input Pulse Levels: 0.45 V to .8 x Vcc
Timing Measurement Reference Level, Input and Output: 0.8 V and .7 x Vcc
Addresses
CE#
OE#
WE#
Outputs
Reset#
RY/BY#
HIGH Z
Output Valid
Addresses Stable
t
ACC
t
DF
t
OH
t
OEH
t
CE
t
OE
t
RC
0V
Figure 5. AC Waveforms for READ Operations
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