參數(shù)資料
型號(hào)： EM614163A-35
廠商： Electronic Theatre Controls, Inc.
英文描述： 256K x 16 High Speed EDO DRAM
中文描述： 256K × 16高速EDO公司的DRAM
文件頁(yè)數(shù)： 9/23頁(yè)
文件大?。?/td> 145K
代理商： EM614163A-35
EtronTech
Em614163A-30/35/40/45
Preliminary
9
April 1997
Notes:
1. Assume t
T
= 2ns.
2. An initial pause of 100 us is required after power up followed by a minimum of eight initialization cycles
(
RAS
-only refresh cycle or
CAS
-beofre-
RAS
refresh cycle). If the internal refresh counter is used, a
minimum of eight
CAS
-before-
RAS
refresh cycles are required.
3. In delayed write or read-modify-write cycles,
OE
must disable output buffer prior to applying data to the
device.
4. When both
LCAS
and
UCAS
go low at the same time, all 16-bits data are written into the device.
LCAS
and
UCAS
cannot be straggered within the same write/read cycles.
5. All the V
CC
and all the V
SS
pins shall be supplied with the same voltages.
6. t
RAS
(min) = t
RWD
(min) + t
RWL
(min) + t
T
in read-modify-write cycle.
7. t
CAS
(min) = t
CWD
(min) + t
CWL
(min) + t
T
in read-modify-write cycle.
8. t
ASC
, t
CAH
, t
RCS
, t
CSR
, t
WCS
, t
WCH
, and t
RPC
are determined by the earlier falling edge of
UCAS
or
LCAS
.
9. Operation with the t
RCD
(max) limit insures that t
RAC
(max) can be met. t
RCD
(max) is specified as a reference
point only: If t
RCD
is greater than the specified t
RCD
(max) limit, then access time is controlled exclusively by
t
CAC
.
10. Operation with the t
RAD
(max) limit insures that t
RAC
(max) can be met. t
RAD
(max) is specified as a
reference point only: If t
RAD
is greater than the specified t
RAD
(max) limit, then access time is controlled
exclusively by t
AA
.
11. t
CRP
, t
CHR
, t
RCH
, t
CPA
and t
CPW
are determined by the later rising edge of
UCAS
or
LCAS
.
12. V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Also, transition times are
measured between V
IH
and V
IL
.
13. Assumes that t
RCD
t
RCD
(max) and t
RAD
t
RAD
(max). If t
RCD
or t
RAD
is greater than the maximum
recommended value shown in this table, t
RAC
exceeds the value shown.
14. Assumes that t
RCD
t
RCD
(max) and t
RAD
t
RAD
(max).
15. Access time is determined by the longer of t
AA
or t
CAC
or t
CPA
.
16. t
CAC
is guaranteed for one TTL and 50pF load.
17. Assumes that t
RCD
t
RCD
(max) and t
RAD
t
RAD
(max).
18. Either t
RCH
or t
RRH
must be satisfied for a read cycle.
19. t
OFF
(max) and t
OEZ
(max) define the time at which the output achieves the open circuit condition and is not
referenced to output voltage levels. The t
OFF
is determined by the later rising edge of
RAS
or
CAS
.
20. t
WCS
, t
RWD
, t
CWD
, and t
AWD
are not restrictive operating parameters. They are included in the data sheet as
electrical characteristics only; if t
WCS
ù
t
WCS
(min), the cycle is an early write cycle and the data out pin
will remain open circuit (high impedance) throughout the entire cycle; if t
RWD
ù
t
RWD
(min), t
CWD
ù
t
CWD
(min), t
AWD
ù
t
AWD
(min) and t
CPW
ù
t
CPW
(min), the cycle is a read-modify-write and the data output
will contain data read from the selected cell; if neither of the above sets of conditions is satisfied, the
condition of the data out (at access time) is indeterminate.
21. t
CWL
shall be satisfied by both
UCAS
,
LCAS
.
22. These parameters are referenced to
UCAS
or
LCAS
leading edge in an early write cycle and to
WE
edge
in a delayed write or a read-modify-write cycle.
23. t
CPN
, t
CP
, and t
CPT
are determined by the time that both
UCAS
and
LCAS
are high.
24. t
RASP
defines
RAS
pulse width in fast page mode cycles.
25. Assume t
T
= 2ns.
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