參數(shù)資料
型號: EFM32TG840F32
廠商: Energy Micro
文件頁數(shù): 94/136頁
文件大小: 0K
描述: MCU 32BIT 32KB FLASH 64-QFN
特色產(chǎn)品: EFM32 Tiny Gecko
標準包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: EBI/EMI,I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,DMA,LCD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-VFQFN 裸露焊盤
包裝: 標準包裝
其它名稱: 914-1036-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
60
www.energymicro.com
3.5.2.4 Condition flags
If S is specified, these instructions:
update the N and Z flags according to the result
can update the C flag during the calculation of Operand2, see Section 3.3.3 (p. 38)
do not affect the V flag.
3.5.2.5 Examples
AND
R9, R2, #0xFF00
ORREQ
R2, R0, R5
ANDS
R9, R8, #0x19
EORS
R7, R11, #0x18181818
BIC
R0, R1, #0xab
ORN
R7, R11, R14, ROR #4
ORNS
R7, R11, R14, ASR #32
3.5.3 ASR, LSL, LSR, ROR, and RRX
Arithmetic Shift Right, Logical Shift Left, Logical Shift Right, Rotate Right, and Rotate Right with Extend.
3.5.3.1 Syntax
op{S}{cond} Rd, Rm, Rs
op{S}{cond} Rd, Rm, #n
RRX{S}{cond} Rd, Rm
where:
op
is one of:
ASR
Arithmetic Shift Right.
LSL
Logical Shift Left.
LSR
Logical Shift Right.
ROR
Rotate Right.
S
is an optional suffix. If S is specified, the condition code flags are updated on the result of the
operation, see Section 3.3.7 (p. 43) .
Rd
is the destination register.
Rm
is the register holding the value to be shifted.
Rs
is the register holding the shift length to apply to the value in Rm. Only the least significant byte is
used and can be in the range 0 to 255.
n
is the shift length. The range of shift length depends on the instruction:
ASR
shift length from 1 to 32
LSL
shift length from 0 to 31
LSR
shift length from 1 to 32
ROR
shift length from 1 to 31.
Note
MOV{S}{cond} Rd, Rm
is the preferred syntax for LSL{S}{cond} Rd, Rm, #0.
3.5.3.2 Operation
ASR
, LSL, LSR, and ROR move the bits in the register Rm to the left or right by the number of places
specified by constant n or register Rs.
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