參數(shù)資料
型號(hào): EFM32TG222F32
廠商: Energy Micro
文件頁(yè)數(shù): 75/136頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品: EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 37
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1029-6
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
43
www.energymicro.com
Note
For B, BL, CBNZ, and CBZ instructions, the value of the PC is the address of the current
instruction plus 4 bytes.
For all other instructions that use labels, the value of the PC is the address of the current
instruction plus 4 bytes, with bit[1] of the result cleared to 0 to make it word-aligned.
Your assembler might permit other syntaxes for PC-relative expressions, such as a label
plus or minus a number, or an expression of the form [PC, #number].
3.3.7 Conditional execution
Most data processing instructions can optionally update the condition flags in the Application Program
Status Register (APSR) according to the result of the operation, see Section 2.1.3.5.1 (p. 9) . Some
instructions update all flags, and some only update a subset. If a flag is not updated, the original value
is preserved. See the instruction descriptions for the flags they affect.
You can execute an instruction conditionally, based on the condition flags set in another instruction,
either:
immediately after the instruction that updated the flags
after any number of intervening instructions that have not updated the flags.
Conditional execution is available by using conditional branches or by adding condition code suffixes
to instructions. See Table 3.4 (p. 44) for a list of the suffixes to add to instructions to make them
conditional instructions. The condition code suffix enables the processor to test a condition based on
the flags. If the condition test of a conditional instruction fails, the instruction:
does not execute
does not write any value to its destination register
does not affect any of the flags
does not generate any exception.
Conditional instructions, except for conditional branches, must be inside an If-Then instruction block. See
Section 3.9.3 (p. 76) for more information and restrictions when using the IT instruction. Depending
on the vendor, the assembler might automatically insert an IT instruction if you have conditional
instructions outside the IT block.
Use the CBZ and CBNZ instructions to compare the value of a register against zero and branch on the
result.
This section describes:
3.3.7.1 The condition flags
The APSR contains the following condition flags:
N Set to 1 when the result of the operation was negative, cleared to 0 otherwise.
Z
Set to 1 when the result of the operation was zero, cleared to 0 otherwise.
C Set to 1 when the operation resulted in a carry, cleared to 0 otherwise.
V
Set to 1 when the operation caused overflow, cleared to 0 otherwise.
For more information about the APSR see Section 2.1.3.5 (p. 8) .
A carry occurs:
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