參數(shù)資料
型號(hào): EDS1232AABB
廠商: Elpida Memory, Inc.
英文描述: 128M bits SDRAM
中文描述: 128兆位內(nèi)存
文件頁(yè)數(shù): 14/55頁(yè)
文件大?。?/td> 564K
代理商: EDS1232AABB
EDS1232CABB, EDS1232CATA
Preliminary Data Sheet E0247E40 (Ver. 4.0)
14
Read command (/CS, /CAS = Low, /RAS, /WE = High)
Read data is available after /CAS latency requirements have been met. This command sets the burst start address
given by the column address.
/WE
/CAS
/RAS
/CS
CKE
CLK
H
Add
A10
(Bank select)
Col.
Column Address and and Read Command
CBR (auto) refresh command (/CS, /RAS, /CAS = Low, /WE, CKE = High)
This command is a request to begin the CBR (auto)
refresh operation. The refresh address is generated internally.
Before executing CBR (auto) refresh, all banks must be precharged. After this cycle, all banks will be in the idle
(precharged) state and ready for a row activate command. During tRC period (from refresh command to refresh or
activate command), the Synchronous DRAM cannot accept any other command
Add
A10
(Bank select)
/WE
/CAS
/RAS
/CS
CKE
CLK
H
CBR (auto) Refresh Command
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參數(shù)描述
EDS1232AABB-60 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|4X1MX32|CMOS|BGA|90PIN|PLASTIC
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