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參數(shù)資料
| 型號(hào)： | EDI8L24129V |
| 英文描述： | 128Kx24 SRAM 3.3 Volt(128Kx24, 3.3V,CMOS靜態(tài)RAM) |
| 中文描述： | 128Kx24 SRAM的3.3伏（128Kx24，3.3伏，靜態(tài)內(nèi)存的CMOS） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 512K |
| 代理商： | EDI8L24129V |
5
EDI8L24129V
White Electronic Designs Corporation Westborough, MA 01581
(508) 366-5151 www.whiteedc.com
July1999 Rev
ECO
Note 1: Parameter guaranteed, but not tested.
Symbol
10ns
12ns
15ns
Parameter
JEDEC
Alt.
Min
Max
Min Max
Min
Max
Units
Write Cycle Time
TAVAV
TWC
10
12
15
ns
Chip Enable to End of Write
TELWH
TCW
8
9
ns
TELEH
TCW
8
9
ns
Address Setup Time
TAVWL
TAS
0
ns
TAVEL
TAS
0
ns
Address Valid to End of Write
TAVWH
TAW
8
9
10
ns
TAVEH
TAW
8
9
10
ns
Write Pulse Width
TWLWH
TWP
8
10
11
ns
TWLEH
TWP
8
10
11
ns
Write Recovery Time
TWHAX
TWR
0
ns
TEHAX
TWR
0
ns
Data Hold Time
TWHDX
TDH
0
ns
TEHDX
TDH
0
ns
Write to Output in High Z (1)
TWLQZ TWHZ
0
5
0
6
0
7
ns
DatatoWriteTime
TDVWH
TDW
6
7
ns
TDVEH
TDW
6
7
ns
Output Active from End of Write (1) TWHQX TWLZ
3
ns
AC CHARACTERISTICS - WRITE CYCLE
WRITE CYCLE - W CONTROLLED
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