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參數(shù)資料
| 型號(hào)： | EDI8L24129V |
| 英文描述： | 128Kx24 SRAM 3.3 Volt(128Kx24, 3.3V,CMOS靜態(tài)RAM) |
| 中文描述： | 128Kx24 SRAM的3.3伏（128Kx24，3.3伏，靜態(tài)內(nèi)存的CMOS） |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 512K |
| 代理商： | EDI8L24129V |
1
EDI8L24129V
White Electronic Designs Corporation Westborough, MA 01581
(508) 366-5151 www.whiteedc.com
July1999 Rev
ECO
128Kx24 SRAM 3.3 Volt
FEATURES
128Kx24 bit CMOS Static
Random Access Memory Array
Fast Access Times: 10, 12, and 15ns
Master Output Enable and Write Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Surface Mount Package
119 Lead BGA (JEDEC MO-163), No. 391
Small Footprint, 14mm x 22mm
Multiple Ground Pins for Maximum
Noise Immunity
Single +3.3V (±5%) Supply Operation
DSP Memory Solution
Motorola DSP5630xTM
Analog Devices SHARCTM
PIN CONFIGURATION
Pin Symbols
The EDI8L24129VxxBC is a 3.3V, three megabit SRAM constructed
with three 128Kx8 die mounted on a multi-layer laminate substrate.
With 10 to 15ns access times, x24 width and a 3.3V operating voltage,
the EDI8L24129V is ideal for creating a single chip memory solution
for the Motorola DSP5630x (Figure 3) or a two chip solution for the
Analog Devices SHARCTM DSP (Figure 4).
The single or dual chip memory solutions offer improved system
performance by reducing the length of board traces and the number of
board connections compared to using multiple monolithic devices. For
example, the capacitance load on the data lines for the BGA package
is 58% less than a monolithic SOJ solution.
The JEDEC Standard 119 lead BGA provides a 44% space savings
over using 128Kx8, 300mil wide SOJs and the BGA package has a
maximum height of 100 mils compared to 148 mils for the SOJ
packages. The BGA package also allows the use of the same
manufacturing and inspection techniques as the Motorola DSP, which
is also in a BGA package.
1
2
3
4
5
6
7
A
NC
AO
A1
A2
A3
A4
NC
B
NC
A5
A6
E
A7
A8
NC
C
I/012
NC
I/00
D
I/013
VCC
GND
VCC
I/01
E
I/014
GND
VCC
GND
VCC
GND
I/02
F
I/015
VCC
GND
VCC
I/03
G
I/016
GND
VCC
GND
VCC
GND
I/04
H
I/017
VCC
GND
VCC
I/05
I
NC
GND
VCC
GND
VCC
GND
NC
J
I/018
VCC
GND
VCC
I/06
K
I/019
GND
VCC
GND
VCC
GND
I/07
L
I/020
VCC
GND
VCC
I/08
M
I/021
GND
VCC
GND
VCC
GND
I/09
N
I/022
VCC
GND
VCC
I/010
O
I/023
NC
I/011
P
NC
A9
A10
W
A11
A12
NC
Q
NC
A13
A14
G
A15
A16
NC
A-A16
Address Inputs
E
ChipEnable
W
Master Write Enable
G
Master Output
Enable
DQ-DQ23
Common Data Input/
Output
VCC
Power (3.3V±5%)
GND
Ground
NC
No Connection
Pin Names
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