- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384280 > EDE5108GBSA (Elpida Memory, Inc.) 512M bits DDR-II SDRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | EDE5108GBSA |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 512M bits DDR-II SDRAM |
| 中文描述： | 512M比特的DDR - II內(nèi)存 |
| 文件頁(yè)數(shù)： | 20/66頁(yè) |
| 文件大?。?/td> | 697K |
| 代理商： | EDE5108GBSA |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)當(dāng)前第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Data Sheet E0323E90 (Ver. 9.0)
20
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
/CS
/RAS /CAS /WE
Address
Command
Operation
Notes
Idle
H
×
×
×
×
DESL
Nop or Power down
L
H
H
H
×
NOP
Nop or Power down
L
H
L
H
BA, CA, A10 (AP)
READ
ILLEGAL
1
L
H
L
H
BA, CA, A10 (AP)
READA
ILLEGAL
1
L
H
L
L
BA, CA, A10 (AP)
WRIT
ILLEGAL
1
L
H
L
L
BA, CA, A10 (AP)
WRITA
ILLEGAL
1
L
L
H
H
BA, RA
ACT
Row activating
L
L
H
L
BA, A10 (AP)
PRE
Precharge
L
L
H
L
A10 (AP)
PALL
Precharge all banks
L
L
L
H
×
REF
Auto refresh
2
L
L
L
H
×
SELF
Self refresh
2
L
L
L
L
BA, MRS-OPCODE
MRS
Mode register accessing
2
L
L
L
L
BA, EMRS-OPCODE
EMRS
Extended mode register accessing
2
Bank(s) active
H
×
×
×
×
DESL
Nop
L
H
H
H
×
NOP
Nop
L
H
L
H
BA, CA, A10 (AP)
READ
Begin Read
L
H
L
H
BA, CA, A10 (AP)
READA
Begin Read
L
H
L
L
BA, CA, A10 (AP)
WRIT
Begin Write
L
H
L
L
BA, CA, A10 (AP)
WRITA
Begin Write
L
L
H
H
BA, RA
ACT
ILLEGAL
1
L
L
H
L
BA, A10 (AP)
PRE
Precharge
L
L
H
L
A10 (AP)
PALL
Precharge all banks
L
L
L
H
×
REF
ILLEGAL
L
L
L
H
×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE
MRS
ILLEGAL
L
L
L
L
BA, EMRS-OPCODE
EMRS
ILLEGAL
Read
H
×
×
×
×
DESL
Continue burst to end -> Row active
L
H
H
H
×
NOP
Continue burst to end -> Row active
L
H
L
H
BA, CA, A10 (AP)
READ
Burst interrupt
1, 4
L
H
L
H
BA, CA, A10 (AP)
READA
Burst interrupt
1, 4
L
H
L
L
BA, CA, A10 (AP)
WRIT
ILLEGAL
1
L
H
L
L
BA, CA, A10 (AP)
WRITA
ILLEGAL
1
L
L
H
H
BA, RA
ACT
ILLEGAL
1
L
L
H
L
BA, A10 (AP)
PRE
ILLEGAL
1
L
L
H
L
A10 (AP)
PALL
ILLEGAL
L
L
L
H
×
REF
ILLEGAL
L
L
L
H
×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE
MRS
ILLEGAL
L
L
L
L
BA, EMRS-OPCODE
EMRS
ILLEGAL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDE5104AESK | 512M bits DDR2 SDRAM |
| EDE5104AESK-4A-E | 512M bits DDR2 SDRAM |
| EDE5104AESK-5C-E | 512M bits DDR2 SDRAM |
| EDE5104AESK-6E-E | 512M bits DDR2 SDRAM |
| EDE5104GBSA-4A-E | 512M bits DDR-II SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDE5108GBSA-4A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR-II SDRAM |
| EDE5108GBSA-5A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR-II SDRAM |
| EDE5116ABSE | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5116ABSE-4A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5116ABSE-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。