參數(shù)資料
型號(hào): EDE5108AESK-4A-E
廠商: ELPIDA MEMORY INC
元件分類(lèi): DRAM
英文描述: 512M bits DDR2 SDRAM
中文描述: 64M X 8 DDR DRAM, 0.6 ns, PBGA60
封裝: ROHS COMPLIANT, FBGA-60
文件頁(yè)數(shù): 46/66頁(yè)
文件大?。?/td> 697K
代理商: EDE5108AESK-4A-E
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Data Sheet E0323E90 (Ver. 9.0)
46
Write Data Mask
One write data mask (DM) pin for each 8 data bits (DQ) will be supported on DDR2 SDRAMs, Consistent with the
implementation on DDR-I SDRAMs. It has identical timings on write operations as the data bits, and though used in
a uni-directional manner, is internally loaded identically to data bits to insure matched system timing. DM is not used
during read cycles.
DQ
DQS
/DQS
T1
T2
T3
T4
T5
T6
DM
Write mask latency = 0
Data Mask Timing
in
in
in
in
in
in
in
in
/CK
CK
DQS, /DQS
DQ
DM
DQS, /DQS
DQ
DM
Command
[tDQSS(min.)]
tWR
tDQSS
WL
tDQSS
WL
[tDQSS(max.)]
WRIT
NOP
in0
in2 in3
in0
in2 in3
Data Mask Function, WL = 3, AL = 0 shown
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