參數(shù)資料
型號： EDE5104ABSE-4A-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 512M bits DDR2 SDRAM
中文描述： 128M X 4 DDR DRAM, 0.6 ns, PBGA64
封裝： ROHS COMPLIANT, FBGA-64
文件頁數(shù)： 52/66頁
文件大?。?/td> 697K
代理商： EDE5104ABSE-4A-E
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Data Sheet E0323E90 (Ver. 9.0)
52
Burst Write with Auto-Precharge [WRITA]
If A10 is high when a write command is issued, the Write with auto-precharge function is engaged. The DDR2
SDRAM automatically begins precharge operation after the completion of the burst writes plus write recovery time
(tWR). The bank undergoing auto-precharge from the completion of the write burst may be reactivated if the
following two conditions are satisfied.
(1) The data-in to bank activate delay time (tWR + tRP) has been satisfied.
(2) The /RAS cycle time (tRC) from the previous bank activation has been satisfied.
in1
in3
/CK
CK
T0
T1
T2
T3
T4
T5
T6
T7
T12
Command
DQS, /DQS
DQ
>
tWR
=
>
tRC
=
Auto Precharge Begins
Completion of the Burst Write
in0
in2
Posted
WRIT
ACT
NOP
>
tRP
=
WL = RL –1 = 2
A10 = 1
Burst Write with Auto-Precharge (tRC Limit) (WL = 2, tWR =2, tRP=3)
NOP
CK
/CK
T0
T3
T4
T5
T6
T7
T8
T9
T10
Command
DQS, /DQS
DQ
>
tWR
=
>
tRC
=
Auto Precharge Begins
Completion of the Burst Write
in0
in2
NOP
in1
in3
Posted
WRIT
ACT
>
tRP
=
WL = RL –1 = 4
A10 = 1
Burst Write with Auto-Precharge (tWR + tRP) (WL = 4, tWR =2, tRP=3)
相關(guān)PDF資料
PDF描述
EDE5108ABSE-4A-E 512M bits DDR2 SDRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDE5104ABSE-5C-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5104AESK 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5104AESK-4A-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5104AESK-5C-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5104AESK-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
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