參數(shù)資料
型號(hào): EDD2516AETA-7A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits DDR SDRAM
中文描述: 16M X 16 DDR DRAM, 0.75 ns, PDSO66
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-66
文件頁(yè)數(shù): 25/52頁(yè)
文件大?。?/td> 492K
代理商: EDD2516AETA-7A-E
EDD2508AETA, EDD2516AETA
Data Sheet E0859E50 (Ver. 5.0)
25
Mode Register and Extended Mode Register Set
There are two mode registers, the mode register and the extended mode register so as to define the operating
mode. Parameters are set to both through the A0 to the A12 and BA0, BA1 pins by the mode register set command
[MRS] or the extended mode register set command [EMRS]. The mode register and the extended mode register are
set by inputting signal via the A0 to the A12 and BA0, BA1 during mode register set cycles. BA0 and BA1 determine
which one of the mode register or the extended mode register are set. Prior to a read or a write operation, the mode
register must be set.
Remind that no other parameters shown in the table bellow are allowed to input to the registers.
A2 A1 A0 Burst Length
0
0
0
0
1
1
1
0
1
2
4
8
0
0
0
Reserved
1
1
1
1
0
0
1
1
0
1
0
1
Reserved
Reserved
Reserved
Reserved
A3
0
1
Sequential
Interleave
Burst Type
A6 A5 A4 CAS Latency
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Reserved
Reserved
2
3
Reserved
Reserved
2.5
1
1
1
0
1
1
1
0
1
Reserved
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
0
0
0
0
DR
LMODE
BT
BL
A8
0
1
No
Yes
DLL Reset
A11
A10
A12
BA1
0
BA0
0
MRS
Mode Register Set [MRS] (BA0 = 0, BA1 = 0)
A0
0
1
DLL Enable
DLL Disable
DLL Control
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
0
0
0
0
0
0
0
0
0
DS
DLL
0
A11 A10
A12
BA1
0
BA0
1
EMRS
A1
0
1
Normal
Weak
Driver Strength
Extended Mode Register Set [EMRS] (BA0 = 1, BA1 = 0)
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