- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384277 > EDD2508AKTA-5-E (Elpida Memory, Inc.) 256M bits DDR SDRAM (32M words x 8 bits, DDR400) PDF資料下載
參數(shù)資料
| 型號(hào)： | EDD2508AKTA-5-E |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| 中文描述： | 256M比特DDR SDRAM內(nèi)存（32M的字× 8位，支持DDR400） |
| 文件頁數(shù)： | 18/48頁 |
| 文件大?。?/td> | 551K |
| 代理商： | EDD2508AKTA-5-E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
EDD2508AKTA-5-E
Preliminary Data Sheet E0609E20 (Ver. 2.0)
18
Command Truth Table for CKE
Current State
CKE
n – 1 n
/CS /RAS /CAS /WE Address
Operation
Note
Self refresh
H
×
×
×
×
×
×
INVALID, CK (n-1) would exit self refresh
L
H
H
×
×
×
×
Self refresh recovery
L
H
L
H
H
×
×
Self refresh recovery
L
H
L
H
L
×
×
ILLEGAL
L
H
L
L
×
×
×
ILLEGAL
L
L
×
×
×
×
×
Maintain self refresh
Self refresh recovery
H
H
H
×
×
×
×
Idle after tRC
H
H
L
H
H
×
×
Idle after tRC
H
H
L
H
L
×
×
ILLEGAL
H
H
L
L
×
×
×
ILLEGAL
H
L
H
×
×
×
×
ILLEGAL
H
L
L
H
H
×
×
ILLEGAL
H
L
L
H
L
×
×
ILLEGAL
H
L
L
L
×
×
×
ILLEGAL
Power down
H
×
×
×
×
×
INVALID, CK (n – 1) would exit power down
L
H
H
×
×
×
×
EXIT power down
→
Idle
L
H
L
H
H
H
×
L
L
×
×
×
×
×
Maintain power down mode
All banks idle
H
H
H
×
×
×
Refer to operations in Function Truth Table
H
H
L
H
×
×
Refer to operations in Function Truth Table
H
H
L
L
H
×
Refer to operations in Function Truth Table
H
H
L
L
L
H
×
CBR (auto) refresh
H
H
L
L
L
L
OPCODE Refer to operations in Function Truth Table
H
L
H
×
×
×
Refer to operations in Function Truth Table
H
L
L
H
×
×
Refer to operations in Function Truth Table
H
L
L
L
H
×
Refer to operations in Function Truth Table
H
L
L
L
L
H
×
Self refresh
1
H
L
L
L
L
L
OPCODE Refer to operations in Function Truth Table
L
×
×
×
×
×
×
Power down
1
Row active
H
×
×
×
×
×
×
Refer to operations in Function Truth Table
Remark: H: VIH. L: VIL.
×
: VIH or VIL
Note: 1. Self refresh can be entered only from the all banks idle state. Power down can be entered only from all
banks idle or row active state.
L
×
×
×
×
×
×
Power down
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDD2508AKTA-5B-E | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| EDD2508AKTA-5C-E | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| EDD2508AKTA-5 | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| EDD2508AKTA-5B | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| EDD2508AKTA-5C | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD2508AKTA-6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM |
| EDD2508AKTA-6B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM |
| EDD2508AKTA-6BLI | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM WTR (Wide Temperature Range) |
| EDD2508AKTA-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM |
| EDD2508AKTA-LI | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM WTR (Wide Temperature Range) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。