- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384277 > EDD1232AABH-7A-E (ELPIDA MEMORY INC) GT 3C 3#16S PIN PLUG PDF資料下載
參數(shù)資料
| 型號： | EDD1232AABH-7A-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | GT 3C 3#16S PIN PLUG |
| 中文描述： | 4M X 32 DDR DRAM, 0.75 ns, PBGA144 |
| 封裝： | ROHS COMPLIANT, FBGA-144 |
| 文件頁數(shù)： | 30/50頁 |
| 文件大小： | 621K |
| 代理商： | EDD1232AABH-7A-E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
EDD1232AABH
Data Sheet E0533E50 (Ver. 5.0)
30
A Write command to the consecutive Write command Interval
Destination row of the consecutive write
command
Bank
address
Row address State
Operation
1. Same
Same
ACTIVE
The consecutive write can be performed after an interval of no less than 1 cycle to
interrupt the preceding write operation.
Precharge the bank to interrupt the preceding write operation. tRP after the
precharge command, issue the ACT command. tRCDWR after the ACT command,
the consecutive write command can be issued. See ‘A write command to the
consecutive precharge interval’ section.
The consecutive write can be performed after an interval of no less than 1 cycle to
interrupt the preceding write operation.
Precharge the bank without interrupting the preceding write operation. tRP after
the precharge command, issue the ACT command. tRCDWR after the ACT
command, the consecutive write command can be issued.
2. Same
Different
—
3. Different
Any
ACTIVE
IDLE
inA0 inA1 inB0 inB1
inB2 inB3
CK
/CK
Address
BA
DQ
Command
t0
tn+1
tn
tn+2
tn+3
tn+4
tn+5
tn+6
Bank0
Active
BL = 4
Bank0
NOP
DQS
ACT
NOP
WRIT
Row
Column A
WRIT
Column B
Column = A
Write
Column = B
Write
WRITE to WRITE Command Interval (same ROW address in the same bank)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDD1232ABBH | 128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 128M bits DDR SDRAM |
| EDD2504AKTA-6B-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7A-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA | 256M bits DDR SDRAM (64M words x 4 bits) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD1232AAFA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232AAFA-6B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232AAFA-7A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232ABBH | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。