- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384277 > EDD1216AJTA-7B-E (ELPIDA MEMORY INC) 128M bits DDR SDRAM PDF資料下載
參數(shù)資料
| 型號： | EDD1216AJTA-7B-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M bits DDR SDRAM |
| 中文描述： | 8M X 16 DDR DRAM, 0.75 ns, PDSO66 |
| 封裝： | ROHS COMPLIANT, PLASTIC, TSOP2-66 |
| 文件頁數(shù)： | 21/52頁 |
| 文件大?。?/td> | 513K |
| 代理商： | EDD1216AJTA-7B-E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
EDD1216AJTA
Data Sheet E0972E30 (Ver. 3.0)
21
Command Truth Table for CKE
Current State
CKE
n – 1 n
/CS /RAS /CAS /WE Address
Operation
Notes
Self-refresh
H
×
×
×
×
×
×
INVALID, CK (n-1) would exit self-refresh
L
H
H
×
×
×
×
Self-refresh recovery
L
H
L
H
H
×
×
Self-refresh recovery
L
H
L
H
L
×
×
ILLEGAL
L
H
L
L
×
×
×
ILLEGAL
L
L
×
×
×
×
×
Maintain self-refresh
Self-refresh recovery
H
H
H
×
×
×
×
Idle after tRC
H
H
L
H
H
×
×
Idle after tRC
H
H
L
H
L
×
×
ILLEGAL
H
H
L
L
×
×
×
ILLEGAL
H
L
H
×
×
×
×
ILLEGAL
H
L
L
H
H
×
×
ILLEGAL
H
L
L
H
L
×
×
ILLEGAL
H
L
L
L
×
×
×
ILLEGAL
Power down
H
×
×
×
×
×
INVALID, CK (n – 1) would exit power down
L
H
H
×
×
×
×
EXIT power down
→
Idle
L
H
L
H
H
H
×
L
L
×
×
×
×
×
Maintain power down mode
All banks idle
H
H
H
×
×
×
Refer to operations in Function Truth Table
H
H
L
H
×
×
Refer to operations in Function Truth Table
H
H
L
L
H
×
Refer to operations in Function Truth Table
H
H
L
L
L
H
×
CBR (auto) refresh
H
H
L
L
L
L
OPCODE Refer to operations in Function Truth Table
H
L
H
×
×
×
Refer to operations in Function Truth Table
H
L
L
H
×
×
Refer to operations in Function Truth Table
H
L
L
L
H
×
Refer to operations in Function Truth Table
H
L
L
L
L
H
×
Self-refresh
1
H
L
L
L
L
L
OPCODE Refer to operations in Function Truth Table
L
×
×
×
×
×
×
Power down
1
Row active
H
×
×
×
×
×
×
Refer to operations in Function Truth Table
Remark: H: VIH. L: VIL.
×
: VIH or VIL
Note: 1. Self-refresh can be entered only from the all banks idle state. Power down can be entered only from all
banks idle or row active state.
L
×
×
×
×
×
×
Power down
1
相關PDF資料 |
PDF描述 |
|---|---|
| EDD1232AABH | 128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232AABH-6B-E | GT 2C 2#0 SKT PLUG |
| EDD1232AAFA | 128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232AAFA-6B-E | 128M bits DDR SDRAM (4M words x 32 bits) |
| EDD1232AAFA-7A-E | 128M bits DDR SDRAM (4M words x 32 bits) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EDD1216ALTA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-1A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-7A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD12322GBH-6ETS-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR Mobile RAM? WTR (Wide Temperature Range) |
發(fā)布緊急采購，3分鐘左右您將得到回復。