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參數資料
| 型號： | EDD1216AJTA-7B-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M bits DDR SDRAM |
| 中文描述： | 8M X 16 DDR DRAM, 0.75 ns, PDSO66 |
| 封裝： | ROHS COMPLIANT, PLASTIC, TSOP2-66 |
| 文件頁數： | 1/52頁 |
| 文件大小： | 513K |
| 代理商： | EDD1216AJTA-7B-E |
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Document No. E0972E30 (Ver. 3.0)
Date Published July 2007 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2006-2007
DATA SHEET
128M bits DDR SDRAM
EDD1216AJTA (8M words
×
16 bits)
Specifications
Density: 128M bits
Organization
2M words
×
16 bits
×
4 banks
Package: 66-pin plastic TSOP (II)
Lead-free (RoHS compliant)
Power supply: VDD, VDDQ
=
2.5V
±
0.2V
Data rate: 400Mbps/333Mbps/266Mbps (max.)
Four internal banks for concurrent operation
Interface: SSTL_2
Burst lengths (BL): 2, 4, 8
Burst type (BT):
Sequential (2, 4, 8)
Interleave (2, 4, 8)
/CAS Latency (CL): 2, 2.5, 3
Precharge: auto precharge option for each burst
access
Driver strength: normal/weak
Refresh: auto-refresh, self-refresh
Refresh cycles: 4096 cycles/64ms
Average refresh period: 15.6
μ
s
Operating ambient temperature range
TA = 0
°
C to +70
°
C
Features
Double-data-rate architecture; two data transfers per
clock cycle
The high-speed data transfer is realized by the 2 bits
prefetch pipelined architecture
Bi-directional data strobe (DQS) is transmitted
/received with data for capturing data at the receiver
Data inputs, outputs, and DM are synchronized with
DQS
DQS is edge-aligned with data for READs; center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge; data
and data mask referenced to both edges of DQS
Data mask (DM) for write data
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相關代理商/技術參數 |
參數描述 |
|---|---|
| EDD1216ALTA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-1A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD1216ALTA-7A | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2) |
| EDD12322GBH-6ETS-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR Mobile RAM? WTR (Wide Temperature Range) |
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