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SAM4CP [DATASHEET]
43051E–ATPL–08/14
12.11.2.5 MPU Region Attribute and Size Register
Name:
MPU_RASR
Access:
Read/Write
The MPU_RASR defines the region size and memory attributes of the MPU region specified by the MPU_RNR, and enables that
region and any subregions.
MPU_RASR is accessible using word or halfword accesses:
The most significant halfword holds the region attributes.
The least significant halfword holds the region size, and the region and subregion enable bits.
XN: Instruction Access Disable
0: Instruction fetches enabled.
1: Instruction fetches disabled.
AP: Access Permission
See
Table 12-39
.
TEX, C, B: Memory Access Attributes
See
Table 12-37
.
S: Shareable
See
Table 12-37
.
SRD: Subregion Disable
For each bit in this field:
0: Corresponding sub-region is enabled.
1: Corresponding sub-region is disabled.
See
“Subregions”
for more information.
Region sizes of 128 bytes and less do not support subregions. When writing the attributes for such a region, write the SRD field
as 0x00.
SIZE: Size of the MPU Protection Region
The minimum permitted value is 3 (b00010).
The SIZE field defines the size of the MPU memory region specified by the MPU_RNR as follows:
(Region size in bytes) = 2
(SIZE+1)
The smallest permitted region size is 32B, corresponding to a SIZE value of 4. The table below gives an example of SIZE values,
with the corresponding region size and value of N in the MPU_RBAR.
31
30
–
29
28
XN
27
–
26
25
AP
24
23
22
21
20
TEX
19
18
S
17
C
16
B
–
15
14
13
12
11
10
9
8
SRD
7
6
5
4
3
2
1
0
–
SIZE
ENABLE