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參數(shù)資料
| 型號： | DS87C550-QNL |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU EPROM ADC/PWM HS 68-PLCC |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SIO，UART/USART |
| 外圍設(shè)備： | 電源故障復(fù)位，PWM，WDT |
| 輸入/輸出數(shù)： | 55 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 6x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 包裝： | 管件 |
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DS87C550 EPROM High-Speed Microcontroller with ADC and PWM
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ROM address of 5k. This would cause the current address to switch from internal to external and
potentially cause invalid operation. Similarly, do not instantly switch from external to internal memory.
For example, do not select a maximum ROM address of 8kB from an external ROM address of 7kB (if
ROMSIZE is set for 4kB or less).
Off-chip memory is accessed using the multiplexed address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not available as I/O ports. This convention follows the
standard 8051 method of expanding on-chip memory. Off-chip ROM access also occurs if the EA pin is
logic 0. EA overrides all bit settings. The PSEN signal will go active (low) to serve as a chip enable or
output enable when Ports 0 & 2 fetch from external ROM.
ROM MEMORY MAP Figure 2
DATA MEMORY
Unlike many 8051 derivatives, the DS87C550 contains additional on-chip data memory. In addition to
the standard 256 bytes of data RAM accessed by direct instructions, the DS87C550 contains another 1kB
of data memory that is accessed using the MOVX instruction. Although physically on-chip, software
treats this area as though it was located off-chip. The 1kB of SRAM is permanently located from address
0000h to 03FFh (when enabled).
Access to the on-chip data RAM is optional under software control. When enabled by software, the data
SRAM is between 0000h and 03FFh. Any MOVX instruction that uses this area will go to the on-chip
RAM while enabled. MOVX addresses greater than 1kB automatically go to external memory through
Ports 0 & 2.
When disabled, the 1kB memory area is transparent to the system memory map. Any MOVX directed to
the space between 0000h and FFFFh goes to the expanded bus on Ports 0 & 2. This also is the default
condition. This default allows the DS87C550 to drop into an existing system that uses these addresses for
other hardware and still have full compatibility.
The on-chip data area is software selectable using two bits in the Power Management Register (DME1,
DME0). This selection is dynamically programmable. Thus access to the on-chip area becomes
transparent to reach off-chip devices at the same addresses. These bits have the following operation:
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