參數(shù)資料
型號(hào): DS8007A-EAG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 21/41頁(yè)
文件大?。?/td> 0K
描述: IC INTERFACE SMART CARD 48-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
應(yīng)用: 智能卡
接口: 并聯(lián)
電源電壓: 2.7 V ~ 6 V
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
其它名稱: 90-8007A+TAG
DS8007A
Multiprotocol Dual Smart Card Interface
28
______________________________________________________________________________________
START BIT
RSTIN BIT
RSTx
VUP
VCCx
CLKx
I/0x
C4x, C8x
ACTIVATION SEQUENCE
1. PCRx.START BIT IS SET BY SOFTWARE.
CONDITIONS NEEDED (IN HARDWARE) ARE:
MSR.PRx = 1 (CARD x PRESENT)
HSR.PRTLx, SUPL, PRLx, PTL = 0
2. STEP-UP CONVERTER ACTIVATED (MAY ALREADY BE ON IF ANOTHER CARD WAS ACTIVE).
3. VCCx ENABLED TO 1.8V, 3V, OR 5V AS SELECTED BY PCRx.1V8 AND PCR.3V/5V BITS.
VCCx RISES FROM 0V TO 1.8V, 3V, OR 5V WITH A CONTROLLED RISE TIME OF 0.17V/
μs TYPICAL.
4. I/Ox IS PULLED HIGH. C4x, C8x ARE ALSO PULLED HIGH IF PCRx.C4 = 1, PCRx.C8 = 1
(RESPECTIVELY). THESE PINS HAVE INTEGRATED PULLUPS (14k
Ω FOR I/Ox AND
10k
Ω FOR C4x AND C8x) TO VCCx.
5. CLKx OUTPUT IS ENABLED AND RST OUTPUT IS ENABLED.
(PCRx.RSTIN SHOULD BE "0" FOR ACTIVE-LOW RSTx.)
6. PCRx.RSTIN WRITTEN TO "1" BY SOFTWARE AFTER USING TOC TO TIME SUFFICIENT
DURATION OF RSTx PIN ASSERTION.
DEACTIVATION SEQUENCE
1. PCRx.START BIT IS CLEARED BY SOFTWARE.
2. THE ACTIVE-LOW RSTx SIGNAL IS ASSERTED BY SOFTWARE.
3. THE CLKx SIGNAL IS STOPPED.
4. I/Ox, C4x, AND C8x FALL TO 0V.
5. VCCx IS DISABLED AND FALLS TO 0V WITH A TYPICAL RATE OF 0.17V/
μs.
6. STEP-UP CONVERTER IS DEACTIVATED IF NOT IN USE BY ANOTHER CARD AND
PINS CLKx, RSTx, I/Ox, AND VCCx BECOME LOW IMPEDANCE TO GROUND.
TIMING
ACCORDING TO PCRx.C4, PCRx.C8 BITS
VCCx NEEDS TO DECREASE TO LESS THAN 0.4V
ACTIVATION NEEDS TO OCCUR IN UNDER 130
μs
ACTIVATION SEQUENCE
DEACTIVATION SEQUENCE
tACT
tDE
12
3
4
5
1
2
3
4
5
6
t0
t1
t2
t3
t4
t5
t10
t11
t12
t13
t14
t15
UNDEFINED
TS
T0
Figure 9. Card Activation, Deactivation Sequences
Activation Sequencing
An activation sequence can only be requested by a
host device through the parallel bus interface. The host
can request an activation sequence for a specific card
(card A or card B) by setting the START bit of the PCRx
register (where x = A or B as determined by the card
select SCx bits of the CSR). The host software can acti-
vate both cards at the same time, but only one card
can be selected to transmit/receive at a given time. The
activation sequence can only occur given satisfactory
operating conditions (e.g., the card is present and the
supply voltage is correct). These conditions can be
ascertained through the HSR, MSR, and CSR bits.
If the microcontroller attempts to write the PCRx.START
bit to 1 without having satisfied the necessary condi-
tions, the card is not activated and the bit does not
change. The activation time (from the assertion of the
START bit until the clock output is enabled) is less than
130s. The activation sequence is detailed in Figure 9.
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參數(shù)描述
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