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參數(shù)資料
| 型號： | DS26303LN-75+A3 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 61/101頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1/T1/J1 3.3V 144-ELQFP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1/E1/J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP 裸露焊盤 |
| 包裝： | 托盤 |
| 其它名稱： | 90-26303+7N3 |
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DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
62 of 101
6.4.5
Bipolar Violation and Excessive Zero Detector
The DS26303 detects code violations, BPV, and excessive zero errors. The reporting of the errors is done through
the pin RNEGn/CVn.
Excessive zeros are detected if eight consecutive 0s are detected with B8ZS enabled and four consecutive 0s are
detected with HDB3 enabled. Excessive zero detection is selectable when single-rail mode and HDB3/B8ZS
encoding/decoding is selected.
The bits in the EZDE and CVDEB registers determine the combinations that are reported. Table 6-9 outlines the
functionality:
Table 6-9. BPV, Code Violation, and Excessive Zero Error Reporting
CONDITIONS
CVn PIN REPORTS
EZDE is reset, CVDEB is reset
BPV + code violation
EZDE is set, CVDEB is reset
BPV + code violation + excessive zero
EZDE is reset, CVDEB is set
BPV
EZDE is set, CVDEB is set
BPV + excessive zero
6.4.6
LIU Receiver Front-End
It is recommended that the receiver be configured as per Table 6-4 and Figure 6-4. Internal or external mode for
the receiver front end can be selected by register GC.RIMPMS. When this bit is set to external mode the user is
required to supply two 15
Ω resistors (Rt) as shown in Figure 6-4. The internal adjust resistors A75, A100, and A110
will still be set in external mode if 75
Ω, 100Ω, or 110Ω impedance is selected during template selection. However,
the internal 30
Ω resistor will be disconnected. If the user would like all the adjust resistors to be disconnected or
any internal impedance matching, then the user should set the TS.RIMPOFF bit for each LIU or the RIMPOFF pin
when in hardware mode.
6.5
Hitless-Protection Switching (HPS)
Many current redundancy protection implementations use mechanical relays to switch between primary and
backup boards. The switching time in relays is typically in the milliseconds, making T1/E1 HPS impossible. The
switching event likely causes frame-synchronization loss in any equipment downstream, affecting the quality of
service. The same is also true for tri-stating mechanisms that use software or inactive clocks for the triggering of
HPS.
The DS26303 LIU includes fast tri-statable outputs for TTIPn and TRINGn and fast turn-off impedance matching for
the RTIPn and RRINGn within less than one bit cycle. The control logic is shown in Figure 6-5. In software mode,
the user can set the RHPMC bit, which allows the OE pin to control both the transmitter outputs and the receive
impedance matching. This is a very useful function in that control can be done through a hardware pin, allowing a
quick switch to the backup system for both the receiver and the transmitter. Figure 6-6 shows a typical HPS
application in software mode where the OE pin is used for control. In hardware mode, the receiver can have
impedance matching turned off quickly by using the RIMPOFF pin, and the transmitter output can be turned off
quickly by using the OE pin.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS26303LN-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303LN-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26-32.768-STD-020 | 制造商:Micro Crystal Switzerland 功能描述: |
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