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參數(shù)資料
| 型號(hào)： | DS26303LN-75+A3 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 27/101頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1/T1/J1 3.3V 144-ELQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1/E1/J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP 裸露焊盤 |
| 包裝： | 托盤 |
| 其它名稱： | 90-26303+7N3 |
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DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
31 of 101
Register Name:
DFMIE
Register Description:
Driver Fault Monitor Interrupt Enable Register
Register Address:
07h
Bit #
7
6
5
4
3
2
1
0
Name
DFMIE8
DFMIE7
DFMIE6
DFMIE5
DFMIE4
DFMIE3
DFMIE2
DFMIE1
Default
0
Bits 7 to 0: Driver Fault Monitor Interrupt Enable Channel n (DFMIEn).
When this bit is set, a change in DFM
status can generate an interrupt in monitor n.
Register Name:
LOSIS
Register Description:
Loss-of-Signal Interrupt Status Register
Register Address:
08h
Bit #
7
6
5
4
3
2
1
0
Name
LOSIS8
LOSIS7
LOSIS6
LOSIS5
LOSIS4
LOSIS3
LOSIS2
LOSIS1
Default
0
Bits 7 to 0: Loss-of-Signal Interrupt Status Channel n (LOSISn).
When this bit is set, it indicates an LOS status
has transitioned from a 0 to 1 or 1 to 0 and was detected for LIUn. The interrupt for LIUn is enabled in LOSIS. This
bit when latched is cleared by a read operation to the register if GISC.CWE is reset. This bit, when latched, is
cleared by a write operation to the bit if GISC.CWE is set.
Register Name:
DFMIS
Register Description:
Driver Fault Monitor Interrupt Status Register
Register Address:
09h
Bit #
7
6
5
4
3
2
1
0
Name
DFMIS8
DFMIS7
DFMIS6
DFMIS5
DFMIS4
DFMIS3
DFMIS2
DFMIS1
Default
0
Bits 7 to 0: Driver Fault Status Register Channel n (DFMISn).
When this bit is set, it indicates a DFM status has
transitioned from 0 to 1 or 1 to 0 and was detected for LIUn. The interrupt for LIUn is enabled by in DFMIE. This bit
when latched is cleared by a read operation to the register if GISC.CWE is reset. This bit, when latched, is cleared
by a write operation to the bit if GISC.CWE is set.
Register Name:
SWR
Register Description:
Software Reset Register
Register Address:
0Ah
Bit #
7
6
5
4
3
2
1
0
Name
SWR8
SWR7
SWR6
SWR5
SWR4
SWR3
SWR2
SWR1
Default
0
Bits 7 to 0: Software Reset (SWR).
Whenever any write is performed to this register, at least a 1
μs reset will be
generated that resets the DS26303. All the registers will be restored to their default values. A read operation will
always read back all zeros.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS26303LN-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303LN-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26-32.768-STD-020 | 制造商:Micro Crystal Switzerland 功能描述: |
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