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參數(shù)資料
| 型號： | DS2422X |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, UUC |
| 文件頁數(shù)： | 6/23頁 |
| 文件大?。?/td> | 146K |
| 代理商： | DS2422X |
DS2422/DS2423
021998 14/23
Match ROM [55H]
The match ROM command, followed by a 64–bit ROM
sequence, allows the bus master to address a specific
DS242X on a multidrop bus. Only the DS242X that
exactly matches the 64–bit ROM sequence will respond
to the following memory function command. All slaves
that do not match the 64–bit ROM sequence will wait for
a reset pulse. This command can be used with a single
or multiple devices on the bus.
Skip ROM [CCH]
This command can save time in a single drop bus sys-
tem by allowing the bus master to access the memory
functions without providing the 64–bit ROM code. If
more than one slave is present on the bus and a read
command is issued following the Skip ROM command,
data collision will occur on the bus as multiple slaves
transmit simultaneously (open drain pull–downs will
produce a wired–AND result).
Search ROM [F0H]
When a system is initially brought up, the bus master
might not know the number of devices on the 1–Wire
bus or their 64–bit ROM codes. The search ROM com-
mand allows the bus master to use a process of elimina-
tion to identify the 64–bit ROM codes of all slave devices
on the bus. The search ROM process is the repetition of
a simple 3–step routine: read a bit, read the complement
of the bit, then write the desired value of that bit. The bus
master performs this simple, 3–step routine on each bit
of the ROM. After one complete pass, the bus master
knows the contents of the ROM in one device. The
remaining number of devices and their ROM codes may
be identified by additional passes. See Chapter 5 of the
Book of DS19xx iButton Standards for a comprehensive
discussion of a search ROM, including an actual
example.
Overdrive Skip ROM [3CH]
On a single–drop bus this command can save time by
allowing the bus master to access the memory functions
without providing the 64–bit ROM code. Unlike the nor-
mal Skip ROM command the Overdrive Skip ROM sets
the DS242X in the Overdrive Mode (OD = 1). All com-
munication following this command has to occur at
Overdrive Speed until a reset pulse of minimum 480
s
duration resets all devices on the bus to regular speed
(OD = 0).
When issued on a multidrop bus this command will set
all Overdrive–supporting devices into Overdrive mode.
To subsequently address a specific Overdrive–support-
ing device, a reset pulse at Overdrive speed has to be
issued followed by a Match ROM or Search ROM com-
mand sequence. This will speed up the time for the
search process. If more than one slave supporting
Overdrive is present on the bus and the Overdrive Skip
ROM command is followed by a read command, data
collision will occur on the bus as multiple slaves transmit
simultaneously (open drain pull–downs will produce a
wire–AND result).
Overdrive Match ROM [69H]
The Overdrive Match ROM command, followed by a
64–bit ROM sequence transmitted at Overdrive Speed,
allows the bus master to address a specific DS242X on
a multidrop bus and to simultaneously set it in Overdrive
Mode.
Only the DS242X that exactly matches the
64–bit ROM sequence will respond to the subsequent
memory function command. Slaves already in Over-
drive mode from a previous Overdrive Skip or Match
command will remain in Overdrive mode.
All other
slaves that do not match the 64–bit ROM sequence or
do not support Overdrive will return to or remain at regu-
lar speed and wait for a reset pulse of minimum 480
s
duration. The Overdrive Match ROM command can be
used with a single or multiple devices on the bus.
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| DS2423P/T&R | SPECIALTY MEMORY CIRCUIT, PDSO6 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2423 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:4kbit 1-Wire RAM with Counter |
| DS2423D/T&R | 制造商:Maxim Integrated Products 功能描述:IC SRAM 4KBIT 6FLIPCHIP |
| DS2423D/T&R | 功能描述:IC SRAM 4KBIT 6FCHIP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁面:1445 (CN2011-ZH PDF) |
| DS2423MRAB0 | 制造商:Thomas & Betts 功能描述:300A,NLT,3P4W,MG,423,3P480V |
| DS2423P | 功能描述:靜態(tài)隨機(jī)存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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