參數(shù)資料
型號： DS232AS
廠商： DALLAS SEMICONDUCTOR
元件分類： Line Driver or Receiver
英文描述： LINE TRANSCEIVER, PDSO16
封裝： 0.300 INCH, SOIC-16
文件頁數(shù)： 13/28頁
文件大?。?/td> 581K
代理商： DS232AS
MAX15023
Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
20
Maxim Integrated
It is recommended to have a phase margin around
+50° to +60° to maintain a robust loop stability and
well-behaved transient response.
If an electrolytic or large-ESR tantalum output capacitor
is used, the capacitor ESR zero fZO typically occurs
between the LC poles and the crossover frequency fO
(fPO < fZO < fO). In this case, use a Type II (PI or pro-
portional-integral) compensation network.
If a ceramic or low-ESR tantalum output capacitor is
used, the capacitor ESR zero typically occurs above
the desired crossover frequency fO, that is fPO < fO <
fZO. In this situation, choose a Type III (PID or propor-
tional-integral-derivative) compensation network.
Type II Compensation Network
(See Figure 4)
If fZO is lower than fO and close to fPO, the phase lead
of the capacitor ESR zero almost cancels the phase
loss of one of the complex poles of the LC filter around
the crossover frequency. Therefore, a Type II compen-
sation network with a midband zero and a high-fre-
quency pole can be used to stabilize the loop. In Figure
4, RF and CF introduce a midband zero (fZ1). RF and
CCF in the Type II compensation network also provide a
high-frequency pole (fP1), which mitigates the effects of
the output high-frequency ripple.
To calculate the component values for Type II compen-
sation network in Figure 4, follow the instruction below:
1) Calculate the gain of the modulator (GainMOD)—
composed of the regulator’s pulse-width modulator,
LC filter, feedback divider, and associated circuitry
at crossover frequency:
where VIN is the regulator’s input voltage, VOSC is the
amplitude of the ramp in the pulse-width modulator,
VFB is the FB_ input voltage set-point (0.6V typically,
see
Electrical Characteristics table), and VOUT is the
desired output voltage.
The gain of the error amplifier (GainEA) in midband fre-
quencies is:
where gm is the transconductance of the error amplifier.
The total loop gain as the product of the modulator gain
and the error amplifier gain at fO should equal 1. So:
Therefore:
Solving for RF:
2) Set a midband zero (fZ1) at 0.75 x fPO (to cancel
one of the LC poles):
Solving for CF:
3) Place a high-frequency pole at fP1 = 0.5 x fSW (to
attenuate the ripple at the switching frequency, fSW)
and calculate CCF using the following equation:
C
Rf
C
CF
FSW
F
=
××
1
π
C
Rf
F
FPO
=
××
×
1
20 75
π
.
f
RC
f
Z
FF
PO
1
2
075
=
××
=×
π
.
R
Vf
L
V
g
ESR
F
OSC
O
OUT
FB
IN
m
=
××
×
()×
××
×
2
π
V
ESR
fL
V
gR
IN
OSC
O
OUT
FB
OUT
mF
×
××
×
=
()
2
1
π
Gain
MOD
EA
×= 1
Gain
g
R
EA
m
F
=×
Gain
V
ESR
fL
V
MOD
IN
OSC
O
OUT
FB
OUT
=×
××
()
×
2
π
VREF
R1
VOUT
R2
gm
RF
COMP
CF
CCF
Figure 4. Type II Compensation Network
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
DS232AS/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX DUAL RS-232 5V 16-SOIC
DS232AS/T&R 功能描述:RS-232接口集成電路 RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝:
DS232AS+ 功能描述:RS-232接口集成電路 Dual RS-232 Transmitter/Receiver RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝:
DS232AS+T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX DUAL RS-232 5V 16-SOIC
DS232AS+T&R 功能描述:RS-232接口集成電路 RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝:
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