- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄97867 > DS21FF42N (DALLAS SEMICONDUCTOR) DATACOM, FRAMER, PBGA300 PDF資料下載
參數(shù)資料
| 型號(hào)： | DS21FF42N |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA300 |
| 封裝： | 27 X 27 MM, BGA-300 |
| 文件頁(yè)數(shù)： | 41/115頁(yè) |
| 文件大小： | 534K |
| 代理商： | DS21FF42N |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)當(dāng)前第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)
DS21FF42/DS21FT42
31 of 115
NOTES:
1. Test Registers 1 and 2 are used only by the factory; these registers must be cleared (set to all zeros) on
power– up initialization to insure proper operation.
2. Register banks AxH, BxH, CxH, DxH, ExH, and FxH are not accessible.
9. PARALLEL PORT
The DS21Q42 is controlled via either a nonmultiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by
an external microcontroller or microprocessor. The DS21Q42 can operate with either Intel or Motorola
bus timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parenthesis (). See the timing diagrams in
the A.C. Electrical Characteristics in Section 25 for more details.
10.
CONTROL, ID AND TEST REGISTERS
The operation of each framer within the DS21Q42 is configured via a set of eleven control registers.
Typically, the control registers are only accessed when the system is first powered up. Once a channel in
the DS21Q42 has been initialized, the control registers will only need to be accessed when there is a
change in the system configuration. There are two Receive Control Register (RCR1 and RCR2), two
Transmit Control Registers (TCR1 and TCR2), and seven Common Control Registers (CCR1 to CCR7).
Each of the eleven registers are described in this section. There is a device Identification Register (IDR)
at address 0Fh. The MSB of this read–only register is fixed to a zero indicating that the DS21Q42 is
present. The E1 pin–for–pin compatible version of the DS21Q42 is the DS21Q44 and it also has an ID
register at address 0Fh and the user can read the MSB to determine which chip is present since in the
DS21Q42 the MSB will be set to a zero and in the DS21Q44 it will be set to a one. The lower four bits
of the IDR are used to display the die revision of the chip.
POWER–UP SEQUENCE
The DS21Q42 does not automatically clear its register space on power–up. After the supplies are stable,
each of the four framer’s register space should be configured for operation by writing to all of the internal
registers. This includes setting the Test and all unused registers to 00Hex.
This can be accomplished using a two-pass approach on each framer within the DS21Q42.
1. Clear framer’s register space by writing 00H to the addresses 00H through 09FH.
2. Program required registers to achieve desired operating mode.
NOTE:
When emulating the DS21Q41 feature set (FMS = 1), the full address space (00H through 09FH) must be
initialized. DS21Q41 emulation requires address pin A7 to be used. FMS is tied to ground for the
DS21FF42/DS21FT42.
Finally, after the TSYSCLK and RSYSCLK inputs are stable, the ESR bit should be toggled from a zero
to a one (this step can be skipped if the elastic stores are disabled).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS21FT44N | DATACOM, FRAMER, PBGA300 |
| DS21FT44 | DATACOM, FRAMER, PBGA300 |
| DS21Q352 | DATACOM, PCM TRANSCEIVER, PBGA256 |
| DS21Q354 | DATACOM, PCM TRANSCEIVER, PBGA256 |
| DS21Q41BT | DATACOM, FRAMER, PQFP128 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21FF42N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl T1/T1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF44 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FF44N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT40 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Four x Three 12 Channel E1 Framer |
| DS21FT40N | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。