- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨�(m菐i)璩�(m脿i)IC缍�(w菐ng) > PDF鐩寗9755 > DS2154LD2+ (Maxim Integrated Products)IC TXRX E1 5V 100-LQFP PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | DS2154LD2+ |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 81/87闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC TXRX E1 5V 100-LQFP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 90 |
| 椤�(l猫i)鍨嬶細 | 鏀剁櫦(f膩)鍣� |
| 椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉)锛� | 1/1 |
| 瑕�(gu墨)绋嬶細 | E1 |
| 闆绘簮闆诲锛� | 4.75 V ~ 5.25 V |
| 瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 100-LQFP |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 100-LQFP锛�14x14锛� |
| 鍖呰锛� | 鎵樼洡(p谩n) |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)绗�24闋�(y猫)绗�25闋�(y猫)绗�26闋�(y猫)绗�27闋�(y猫)绗�28闋�(y猫)绗�29闋�(y猫)绗�30闋�(y猫)绗�31闋�(y猫)绗�32闋�(y猫)绗�33闋�(y猫)绗�34闋�(y猫)绗�35闋�(y猫)绗�36闋�(y猫)绗�37闋�(y猫)绗�38闋�(y猫)绗�39闋�(y猫)绗�40闋�(y猫)绗�41闋�(y猫)绗�42闋�(y猫)绗�43闋�(y猫)绗�44闋�(y猫)绗�45闋�(y猫)绗�46闋�(y猫)绗�47闋�(y猫)绗�48闋�(y猫)绗�49闋�(y猫)绗�50闋�(y猫)绗�51闋�(y猫)绗�52闋�(y猫)绗�53闋�(y猫)绗�54闋�(y猫)绗�55闋�(y猫)绗�56闋�(y猫)绗�57闋�(y猫)绗�58闋�(y猫)绗�59闋�(y猫)绗�60闋�(y猫)绗�61闋�(y猫)绗�62闋�(y猫)绗�63闋�(y猫)绗�64闋�(y猫)绗�65闋�(y猫)绗�66闋�(y猫)绗�67闋�(y猫)绗�68闋�(y猫)绗�69闋�(y猫)绗�70闋�(y猫)绗�71闋�(y猫)绗�72闋�(y猫)绗�73闋�(y猫)绗�74闋�(y猫)绗�75闋�(y猫)绗�76闋�(y猫)绗�77闋�(y猫)绗�78闋�(y猫)绗�79闋�(y猫)绗�80闋�(y猫)鐣�(d膩ng)鍓嶇81闋�(y猫)绗�82闋�(y猫)绗�83闋�(y猫)绗�84闋�(y猫)绗�85闋�(y猫)绗�86闋�(y猫)绗�87闋�(y猫)
DS2154
82 of 87
Table 16-3. AC Characteristics鈥擳ransmit Side
(VDD = 5V 卤5%, TA = 0掳C to +70掳C for DS2154L, TA = -40掳C to +85掳C for DS2154LN.)
PARAMETER
SYMBOL
MIN
TYP
MAX UNITS NOTES
TCLK Period
tCP
488
ns
tCH
75
ns
TCLK Pulse Width
tCL
75
ns
TCLKI Period
tLP
488
ns
tLH
75
ns
TCLKI Pulse Width
tLL
75
ns
tSP
122
648
ns
1
TSYSCLK Period
tSP
122
448
ns
2
tSH
50
ns
TSYSCLK Pulse Width
tSL
50
ns
TSYNC or TSSYNC Setup to TCLK or
TSYSCLK Falling
tSU
20
tCH-5
or
tSH-5
ns
TSYNC or TSSYNC Pulse Width
tPW
50
ns
TSER, TSIG, TDATA, TLINK, TPOSI,
TNEGI Setup to TCLK, TSYSCLK,
TCLKI Falling
tSU
20
ns
TSER, TSIG, TDATA, TLINK, TPOSI,
TNEGI Hold from TCLK, TSYSCLK,
TCLKI Falling
tHD
20
ns
TCLK, TCLKI, or TSYSCLK Rise and
Fall Times
tR, tF
25
ns
Delay TCLKO to TPOSO, TNEGO Valid
tDD
50
ns
Delay TCLK to TESO Valid
tD1
50
ns
Delay TCLK to TCHBLK, TCHBLK,
TSYNC, TLCLK
tD2
50
ns
Delay TSYSCLK to TCHCLK, TCHBLK
tD3
75
ns
NOTES:
1) TSYSCLK = 1.544MHz.
2) TSYSCLK = 2.048MHz.
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS2154LD2+ | 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Enhanced E1 Transceiver RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray |
| DS2154LN | 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Enhanced E1 Transceiver RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray |
| DS2154LN+ | 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Enhanced E1 Transceiver RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray |
| DS2154LNA2 | 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray |
| DS2154LNA2+ | 鍔熻兘鎻忚堪:缍�(w菐ng)绲�(lu貌)鎺у埗鍣ㄨ垏铏曠悊鍣� IC Enhanced E1 Transceiver RoHS:鍚� 鍒堕€犲晢:Micrel 鐢�(ch菐n)鍝�:Controller Area Network (CAN) 鏀剁櫦(f膩)鍣ㄦ暩(sh霉)閲�: 鏁�(sh霉)鎿�(j霉)閫熺巼: 闆绘簮闆绘祦锛堟渶澶у€硷級:595 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:PBGA-400 灏佽:Tray |
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