參數(shù)資料
型號： DS2152LN
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Controller
英文描述： DATACOM, FRAMER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 68/94頁
文件大小： 1003K
代理商： DS2152LN
DS2152
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Each of the bit positions in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represent a DS0
channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent (or
clear). If a DS0 is programmed to be clear, no robbed-bit signaling will be inserted nor will the channel
have Bit 7 stuffing performed. However, in the D4 framing mode, bit 2 will be overwritten by a 0 when a
Yellow Alarm is transmitted. Also, the user has the option to prevent the TTR registers from determining
which channels are to have Bit 7 stuffing performed. If the TCR2.0 and TCR1.3 bits are set to 1, then all
24 T1 channels will have Bit 7 stuffing performed on them regardless of how the TTR registers are
programmed. In this manner, the TTR registers are only affecting which channels are to have robbed-bit
signaling inserted into them. Please see Figure 15-11 for more details.
14.0 LINE INTERFACE FUNCTION
The line interface function in the DS2152 contains three sections; (1) the receiver which handles clock
and data recovery, (2) the transmitter which waveshapes and drives the T1 line, and (3) the jitter
attenuator. Each of these three sections is controlled by the Line Interface Control Register (LICR), which
is described below.
LICR: LINE INTERFACE CONTROL REGISTER (Address=7C Hex)
(MSB)
(LSB)
L2
L1
L0
EGL
JAS
JABDS
DJA
TPD
LICR
SYMBOL
POSITION
NAME AND DESCRIPTION
L2
LICR.7
Line Build Out Select Bit 2. Sets the transmitter build out; see
the Table 14-2
L1
LICR.6
Line Build Out Select Bit 1. Sets the transmitter build out; see
the Table 14-2
L0
LICR.5
Line Build Out Select Bit 0. Sets the transmitter build out; see
the Table 14-2
EGL
LICR.4
Receive Equalizer Gain Limit.
0 = -36 dB
1 = -30 dB
JAS
LICR.3
Jitter Attenuator Select.
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
JABDS
LICR.2
Jitter Attenuator Buffer Depth Select
0 = 128 bits
1 = 32 bits (use for delay sensitive applications)
DJA
LICR.1
Disable Jitter Attenuator.
0 = jitter attenuator enabled
1 = jitter attenuator disabled
TPD
LICR.0
Transmit Power Down.
0 = normal transmitter operation
1 = powers down the transmitter and 3-states the TTIP and
TRING pins
相關(guān)PDF資料
PDF描述
DS2152L DATACOM, FRAMER, PQFP100
DS2153Q DATACOM, FRAMER, PQCC44
DS2154L DATACOM, FRAMER, PQFP100
DS21554L DATACOM, PCM TRANSCEIVER, PQFP100
DS21554LN DATACOM, PCM TRANSCEIVER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2152LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2153DK 功能描述:KIT DESIGN TXRX E1 DS2153 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
DS2153Q 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:E1 Single-Chip Transceiver
DS2153Q-A5 功能描述:IC TXRX E1 1-CHIP 5V 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
DS2153Q-A5/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX E1 1-CHIP 5V 44-PLCC
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