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參數(shù)資料
| 型號： | DS1993L-F5 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, MRDB2 |
| 封裝： | MICRO CAN |
| 文件頁數(shù)： | 23/23頁 |
| 文件大?。?/td> | 537K |
| 代理商： | DS1993L-F5 |
DS1992/DS1993/DS1994
9 of 23
102199
Control Register
7
6
5
4
3
2
1
0
DSEL
STOP
START
AUTO
MAN.
OSC
RO
WPC
WPI
WPR
0201h
0
WPR
Write protect real-time clock/alarms registers
1
WPI
Write protect interval timer/alarms registers
2
WPC
Write protect cycle counter/alarms registers
Setting a write protect bit to a logic 1 will permanently write protect the corresponding counter and alarm
registers, all write protect bits, and additional bits in the control register. The write protect bits can not be
written in a normal manner (see “Write Protect/Programmable Expiration” section).
3
RO
Read only
If a programmable expiration occurs and the read only bit is set to a logic 1, then the DS1994 becomes
read only. If a programmable expiration occurs and the read only bit is a logic 0, then only the 64-bit
lasered ROM can be accessed (see “Write Protect/Programmable Expiration” section).
4
OSC
Oscillator enable
This bit controls the crystal oscillator. When set to a logic 1, the oscillator will start operation. When the
oscillator bit is a logic 0, the oscillator will stop.
5
AUTO/MAN
Automatic/Manual Mode
When this bit is set to a logic 1, the interval timer is in automatic mode. In this mode, the interval timer is
enabled by the data line. When this bit is set to a logic 0, the interval timer is in manual mode. In this
mode the interval timer is enabled by the STOP/START bit.
6
STOP/START
Stop/Start (in Manual Mode)
If the interval timer is in manual mode, the interval timer will start counting when this bit is set to a logic
0 and will stop counting when set to a logic 1. If the interval timer is in automatic mode, this bit has no
effect.
7
DSEL
Delay Select Bit
This bit selects the delay that it takes for the cycle counter and the interval timer (in auto mode) to see a
transition on the data line. When this bit is set to a logic 1, the delay time is 123
±2 ms. This delay allows
communication on the data line without starting or stopping the interval timer and without incrementing
the cycle counter. When this bit is set to a logic 0, the delay time is 3.5
±0.5 ms.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1993L-F5+ | 功能描述:iButton 1Kb/4Kb Memory iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1993L-F5-C01 | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
| DS1994 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:4kb Plus Time Memory iButton |
| DS1994-LF5 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| DS1994L-F5 | 功能描述:iButton RoHS:否 存儲類型:SRAM 存儲容量:512 B 組織: 工作電源電壓:3 V to 5.25 V 接口類型:1-Wire 最大工作溫度:+ 85 C 尺寸:17.35 mm x 5.89 mm 封裝 / 箱體:F5 MicroCan 制造商:Maxim Integrated |
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