參數(shù)資料
型號: DS1993L-F5
廠商: DALLAS SEMICONDUCTOR
元件分類: Memory IC:Other
英文描述: SPECIALTY MEMORY CIRCUIT, MRDB2
封裝: MICRO CAN
文件頁數(shù): 13/23頁
文件大?。?/td> 537K
代理商: DS1993L-F5
DS1992/DS1993/DS1994
20 of 23
102199
Spontaneous interrupts are signaled by the DS1994 by pulling the data line low for 960 to 3840
s as the
interrupt condition begins (Figure 12). After this long low pulse a Presence Pulse will follow. If the alarm
condition occurs just after the master has sent a Reset Pulse, i.e., during the high or low time of the
Presence Pulse, the DS1994 will not assert its Interrupt Pulse until the Presence Pulse is finished (Figure
13).
If the DS1994 cannot assert a spontaneous interrupt, either because the data line was not pulled high,
communication was in progress, or the interrupt was not armed, it will extend the next Reset Pulse to a
total length of 960 to 3840
s (delayed interrupt). If the alarm condition occurs during the reset low time
of the Reset Pulse, the DS1994 will immediately assert its interrupt pulse; thus the total low time of the
pulse can be extended up to 4800
s (Figure 14). If a DS1994 with a not previously signaled alarm
detects a power–on cycle on the 1–Wire bus, it will send a Presence Pulse and wait for the Reset Pulse
sent by the master to extend it and to subsequently issue a Presence Pulse (Figure 15). As long as an
interrupt has not been acknowledged by the master, the DS1994 will continue sending interrupt pulses.
The interrupt signaling discussed so far is valid for the first opportunity the device has to signal an
interrupt. It is not required for the master to acknowledge an interrupt immediately. If an interrupt is not
acknowledged, the DS1994 will continue signaling the interrupt with every Reset Pulse. To do so,
DS1994 devices of Revision B (earlier production parts) will always use the waveform of the Type 2
Interrupt (Figure 14). Devices of Revision C (latest production) will either use the waveform of the Type
2 Interrupt (Figure 14) or the waveform of the Type 1A Interrupt (Figure 13). The waveform of the Type
2 Interrupt will be observed after a communication to a device other than the interrupting one; after
successful communication to the interrupting device (without acknowledging the interrupt) the waveform
of the Type 1A Interrupt will be found.
The revision code of the DS1994 is branded on the lid of the MicroCan. The field RR (see figure on Page
1), just a above the family code, will read Bx for Revision B and Cx for Revision C. (The character “x”
represents a 1-digit number that is not related to the chip inside.) The revision code can also be
determined indirectly by observing the waveforms used for interrupt signaling.
TYPE 1 INTERRUPT Figure 12
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DS1994-LF5 制造商: 功能描述: 制造商:undefined 功能描述:
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