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參數(shù)資料
| 型號： | DS1859E-050/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RES TEMP 50/50K 3MON 16-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 50 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.85 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 95°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
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DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
____________________________________________________________________
15
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION
FUNCTION
68 to 69
SRAM
R
—
Measured MON3
(MSB to LSB)
Digitized measured value for MON3.
See Table 1.
6A to 6D
SRAM
—
Reserved
—
6E
SRAM
—
Logic states
—
Bit 7
—
R
X
HIZSTA
Resistor status bit. A high indicates that both
resistors are in high-impedance mode. A low
indicates that both resistors are operating
normally.
6—
R/W
0
HIZCO
Resistor control bit. Setting this bit high
causes both resistors to go into a high-
impedance state.
5—
—
X
—
4—
—
X
—
3—
—
X
—
2—
R
X
TXF
This status bit is high when OUT1 is high,
assuming there is an external pullup resistor
on OUT1.
1—
R
X
RXL
This status bit is high when OUT2 is high,
assuming there is an external pullup resistor
on OUT2.
0—
RX
RDYB
This status bit goes high when VCC has fallen
below the POA level.
6F
SRAM
—
Conversion updates
—
Bit 7
—
R/W
0
TAU
This bit goes high after a temperature and
address update has occurred for the
corresponding measurement in bytes 60h to
61h. This bit can be written to a 0 by the user
and monitored to verify that a conversion has
occurred.
6—
R/W
0VCCU
This bit goes high after a VCC update has
occurred for the corresponding measurement
in bytes 62h to 63h. This bit can be written to
a 0 by the user and monitored to verify that a
conversion has occurred.
5—
R/W
0
MON1U
This bit goes high after a MON1 update has
occurred for the corresponding measurement
in bytes 64h to 65h. This bit can be written to
a 0 by the user and monitored to verify that a
conversion has occurred.
Main Device (continued)
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