參數(shù)資料
型號: DS1859E-050/T&R
廠商: Maxim Integrated Products
文件頁數(shù): 13/28頁
文件大小: 0K
描述: IC RES TEMP 50/50K 3MON 16-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 50 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.85 V ~ 5.5 V
工作溫度: -40°C ~ 95°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
20
____________________________________________________________________
MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF
LOCATION
FUNCTION
5—
—0
ADEN
Controls if the device responds to one or two device
addresses (see the Memory Description section and
Table 5).
4—
—0
ADFIX
Controls the means by which Main and Auxiliary Device
addresses are set (see the Memory Description section
and Table 5).
3—
—0
APEN
Controls auxiliary write protect. See the Memory
Description section.
2—
—0
MPEN
Controls main write protect. See the Memory Description
section.
1—
—0
INV1
Configures buffer 1 with OUT1 = MINT +
(INV1 [XOR] IN1).
0—
—0
INV2
Configures buffer 2 with OUT2 = INV2 [XOR] IN2.
8A to 8B
EEPROM
——
Reserved
8C
EEPROM
R/W
A2
Device address
Contains Main Device address if the bit ADFIX = 1. If
ADFIX = 0, then address A2h is used.
8D
EEPROM
——
Reserved
8E
EEPROM
R/W
Contains bits used to perform right shift operations on the
A/D output converter. See the Right Shift A/D Conversion
Result section.
7—
—0
6—
—0
MON12
Right Shift Control MSB
5—
—0
MON11
4—
—0
MON10
Right Shift Control LSB
3—
—0
2—
—0
MON22
Right Shift Control MSB
1—
—0
MON21
0—
—0
MON20
Right Shift Control LSB
8F
EEPROM
R/W
Contains bits used to perform right shift operations on the
A/D output converter. See the Right Shift A/D Conversion
Result section.
7—
—0
6—
—0
MON32
Right Shift Control MSB
5—
—0
MON31
4—
—0
MON30
Right Shift Control LSB
3—
—0
2—
—0
1—
—0
0—
—0
Table 01h (continued)
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