參數(shù)資料
型號(hào): DS1825U+T&R
廠商: Maxim Integrated
文件頁數(shù): 9/21頁
文件大小: 287K
描述: IC THERMOMETER DIGITAL 8-USOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 3,000
功能: 溫度計(jì),恒溫計(jì)
傳感器類型: 內(nèi)部
感應(yīng)溫度: -55°C ~ 125°C
精確度: ±2°C(最小值)
拓?fù)洌?/td> 寄存器庫,變簽式暫存器
輸出類型: 數(shù)字
輸出警報(bào):
輸出風(fēng)扇:
電源電壓: 3 V ~ 3.7 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 帶卷 (TR)
DS1825 Programmable Resolution 1-Wire Digital Thermometer With 4-Bit ID
 
9 of 21
 
 
Table 4. THERMOMETER RESOLUTION CONFIGURATION  
 
R1
R0
Resolution
Max Conversion Time
0
0
9-bit
93.75ms
(t
CONV
/8)
0
1
10-bit
187.5ms
(t
CONV
/4)
1
0
11-bit
375ms
(t
CONV
/2)
1
1
12-bit
750ms
(t
CONV
)
 
CRC GENERATION
CRC bytes are provided as part of the DS1825s 64-bit ROM code and in the 9
th
 byte of the scratchpad memory.
The ROM code CRC is calculated from the first 56 bits of the ROM code and is contained in the most significant
byte of the ROM. The scratchpad CRC is calculated from the data stored in the scratchpad, and therefore it
changes when the data in the scratchpad changes. The CRCs provide the bus master with a method of data
validation when data is read from the DS1825. To verify that data has been read correctly, the bus master must re-
calculate the CRC from the received data and then compare this value to either the ROM code CRC (for ROM
reads) or to the scratchpad CRC (for scratchpad reads). If the calculated CRC matches the read CRC, the data has
been received error free. The comparison of CRC values and the decision to continue with an operation are
determined entirely by the bus master. There is no circuitry inside the DS1825 that prevents a command sequence
from proceeding if the DS1825 CRC (ROM or scratchpad) does not match the value generated by the bus master.
 
The equivalent polynomial function of the CRC (ROM or scratchpad) is:
 
CRC = X
8
 + X
5
 + X
4
 + 1
 
The bus master can re-calculate the CRC and compare it to the CRC values from the DS1825 using the polynomial
generator shown in Figure 9. This circuit consists of a shift register and XOR gates, and the shift register bits are
initialized to 0. Starting with the least significant bit of the ROM code or the least significant bit of byte 0 in the
scratchpad, one bit at a time should shifted into the shift register. After shifting in the 56
th
 bit from the ROM or the
most significant bit of byte 7 from the scratchpad, the polynomial generator will contain the re-calculated CRC.
Next, the 8-bit ROM code or scratchpad CRC from the DS1825 must be shifted into the circuit. At this point, if the
re-calculated CRC was correct, the shift register will contain all 0s. Additional information about the Dallas 1-Wire
cyclic redundancy check is available in Application Note 27 entitled Understanding and Using Cyclic Redundancy
Checks with Dallas Semiconductor Touch Memory Products.
 
Figure 9. CRC GENERATOR  
 
 
 
 
 
 
 
 
1-Wire BUS SYSTEM
The 1-Wire bus system uses a single bus master to control one or more slave devices. The DS1825 is always a
slave. When there is only one slave on the bus, the system is referred to as a single-drop system; the system is
multidrop if there are multiple slaves on the bus.
All data and commands are transmitted least significant bit first over the 1-Wire bus.
The following discussion of the 1-Wire bus system is broken down into three topics: hardware configuration,
transaction sequence, and 1-Wire signaling (signal types and timing).
 
(MSB)
(LSB)
XOR
XOR
XOR
INPUT
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